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Different net assigned to a shared pin in another unit of the same component {solved!}
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3
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1551
|
March 9, 2020
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[BUG?] Some Vias not affected by default netclass parameters
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3
|
1552
|
November 20, 2016
|
|
Creating a footprint from PCB/STP with StepUp
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4
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1387
|
April 16, 2023
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CvPcb, Edit Symbol Fields, Edit References, BOM,
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5
|
1266
|
August 17, 2018
|
|
Footprint wizard internals
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3
|
1550
|
May 24, 2018
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Pins and hierarchical pins
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7
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1095
|
September 11, 2023
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Import Netlist resets all Fab layer positions
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7
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1095
|
October 23, 2020
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|
Weird behavior when editing PCB with schematic open
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7
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1095
|
February 18, 2020
|
|
Ground star point
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4
|
1385
|
October 2, 2023
|
|
Can we have component references on both sides of the PCB?
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4
|
1385
|
November 8, 2019
|
|
Netlist issue loading
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2
|
1788
|
March 28, 2018
|
|
Help required for custom thyristor simulation model
|
|
8
|
1033
|
November 18, 2024
|
|
Wires not lining up
|
|
8
|
1032
|
October 13, 2022
|
|
Cover exposed pads with solder mask for EMC reasons
|
|
3
|
1548
|
April 18, 2016
|
|
Can't open KiCad Project?
|
|
6
|
1170
|
May 18, 2022
|
|
Standard page layout in eschema (*.wks)
|
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4
|
1384
|
December 29, 2023
|
|
Job – consultant wanted: PCB board design
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4
|
1384
|
September 23, 2020
|
|
[SOLVED] Tidy or beautifier for tracks?
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7
|
1094
|
April 9, 2024
|
|
How to define interconnected pins in symbol editor
|
|
5
|
1264
|
July 16, 2024
|
|
How to generate a BOM in kicad 5.99?
|
|
5
|
1262
|
May 21, 2021
|
|
Overlapping zones
|
|
6
|
1168
|
October 27, 2023
|
|
What is the reason for plane to pad
|
|
6
|
1168
|
July 5, 2022
|
|
Symbol Editor "Filter" doesn't show all components inside a library?
|
|
8
|
1030
|
August 4, 2024
|
|
LGA component pad spacing is smaller than minimum solder mask bridge size
|
|
5
|
1261
|
September 9, 2024
|
|
KiCad 5.1.11 still copies fp-lib-table from current directory on first use
|
|
7
|
1092
|
February 10, 2022
|
|
Ubuntu PPA has a 4.0.7
|
|
4
|
1382
|
July 21, 2018
|
|
Hide silkscreen for selected area
|
|
6
|
1167
|
March 10, 2022
|
|
Global spread and place
|
|
6
|
1167
|
July 29, 2020
|
|
Edit parts inside a group without ungrouping
|
|
8
|
1029
|
December 18, 2023
|
|
Exporting to simulation software
|
|
8
|
1029
|
September 20, 2021
|
|
Reference Designator Problem With KiCad 5.1.0
|
|
8
|
1029
|
June 20, 2019
|
|
[SOLVED] Setting initial conditions for simulation and timestep
|
|
2
|
1782
|
September 2, 2023
|
|
Export PNG of symbol all white
|
|
6
|
1166
|
February 15, 2021
|
|
Kicad Tools - Reborn
|
|
1
|
2182
|
October 16, 2019
|
|
Unresolved text variable REF
|
|
3
|
1542
|
December 3, 2023
|
|
Two 3.3V different sources
|
|
5
|
1259
|
April 23, 2024
|
|
How do I assign netlist to circle or arc shape?
|
|
5
|
1260
|
September 28, 2023
|
|
What does the line in the photo mean?
|
|
6
|
1165
|
September 29, 2021
|
|
Cvpcb is not loading properly
|
|
6
|
1165
|
September 13, 2017
|
|
Plot to DXF not showing dimensions
|
|
5
|
1259
|
February 25, 2021
|
|
Want a Bundle of Wire Feature over Bus
|
|
4
|
1378
|
May 8, 2024
|
|
[SOLVED] Weird Plane keepout setting
|
|
3
|
487
|
December 31, 2023
|
|
Feature: Components Partnumber
|
|
6
|
1164
|
November 27, 2020
|
|
[SOLVED] V5.99 Cannot add a new symbol library
|
|
4
|
1377
|
March 1, 2021
|
|
Are there any archived nightly builds?
|
|
5
|
1257
|
August 17, 2018
|
|
KiCad nightly : ERC bus member warning
|
|
3
|
1539
|
August 31, 2019
|
|
How should one use schematic sheets?
|
|
4
|
1377
|
January 8, 2024
|
|
Kicad 7 Testing - DRC Routing Issues
|
|
4
|
1377
|
June 4, 2023
|
|
Selecting multiple units of an IC
|
|
4
|
1376
|
August 8, 2022
|
|
Moving corner/single point of a wire
|
|
5
|
1257
|
September 18, 2022
|
