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KiCad 2020 End of Year Fund Drive
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6
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1397
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December 3, 2022
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Discussion of "Part Number" custom field workflow: field visibility, general ergonomics
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12
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323
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June 20, 2025
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tEDAxRingdove and PCB Routers
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10
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352
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July 8, 2025
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ERC Reports False Errors KiCad 8.x and 9.x
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10
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355
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July 7, 2025
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Redundant track remover overrides locked flag on tracks
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10
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354
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August 15, 2025
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Single Pin connected to filled zone in dual row connector
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10
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354
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June 22, 2025
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GND getting ERC errors and warning
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10
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347
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April 26, 2025
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Part ss having the value from schematic
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16
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280
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April 9, 2025
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Crosshair line display PCB
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9
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362
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February 9, 2025
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Multi-unit part with dissimilar unit values
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11
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330
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June 30, 2025
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Dual FET LS489A SOT-23 6L footprint
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14
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299
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July 28, 2025
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Add ISA edge connectors to existing project
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9
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364
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June 8, 2025
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Can fills be edited numerically?
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11
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327
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April 4, 2025
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PWR_FLAG connection through resistor ERC error
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11
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325
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August 5, 2025
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Manual routing parts of a wire (not interactive)
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10
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339
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February 17, 2025
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Where is the updated documentation about Python scripting
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11
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331
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August 11, 2025
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GND plane(copper pour) creates weird design around GND pad
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9
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352
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May 31, 2025
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Schematic design
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9
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351
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January 15, 2025
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Jobsets: Relative paths
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10
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333
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June 17, 2025
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DRC Custom rules
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11
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318
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July 14, 2025
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Title: Equipotential classes do not appear even though nets are present to
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20
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238
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August 12, 2025
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Why is My hierarchy navigator in a separate floating window
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9
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344
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July 12, 2025
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Cannot select footprints when view preset: dimmed/hidden
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9
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341
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May 6, 2025
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How to set either simulation duration or number of pulses (np)
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11
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304
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June 22, 2025
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Question about tolerances for a footprint
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9
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336
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August 10, 2025
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Placement mode
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22
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227
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August 14, 2025
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Find similar objects
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12
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298
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August 15, 2025
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Courtyard: what is it and how to use, what is the "malformed" error
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0
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18646
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October 1, 2022
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I cant find the silkscreen layer?
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9
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332
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April 3, 2025
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Stuck on how to reduce the size of my PCB
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10
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319
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July 30, 2025
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Board2Pdf scale to fit not working for fabrication layers
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10
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315
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July 1, 2025
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Missing connection/ net for "OUT"?
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14
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272
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July 2, 2025
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Beginner Question: Do I need copper fill if the PCB has no GND?
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9
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336
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July 24, 2025
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Blind/Buried Via About Help
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10
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309
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June 11, 2025
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Kicad8 Error: Padstack is not valid (Pad has no layer)
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11
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296
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August 2, 2025
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Slash netnames in imported Eagle project?
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9
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324
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June 14, 2025
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Multi-channel does not copy filled zones associated with reference nets to target rule areas
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9
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326
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June 13, 2025
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Fabrication tool kit generate old version of Gerber's and BOM
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10
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310
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July 13, 2025
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Unexpected Kicad shutdown when opening schematic editor
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9
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320
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May 27, 2025
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How to get a downloaded symbol, footprint or full library into KiCad version 5?
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0
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100404
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October 21, 2019
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Tube amp schematic to pcb
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9
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319
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June 9, 2025
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Issues with solder pad clearance
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9
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315
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July 27, 2025
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Netlist Connecting
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10
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298
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June 13, 2025
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Alternate KiCad Library
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6
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3720
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August 2, 2021
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Failedl DC Simulation of LM317 regulator
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9
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311
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August 22, 2025
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doAnalyses: TRAN: Timestep too small; initial timepoint: trouble with node "probe_int_probe_int_net-_u1-_on/off__xu1_5_xu1_5" run simulation(s) aborted
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9
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312
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July 24, 2025
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Not working 555 simulation
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11
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276
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June 13, 2025
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Copy paste creates scripts
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9
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299
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November 7, 2024
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Old Man Question: Changing font size in Appearance/Properties UI windows? (MAC)
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12
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256
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July 30, 2025
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"circuit not parsed." trying to simulate
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11
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270
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August 1, 2025
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