Question about tolerances for a footprint

Hi,

I’m creating a footprint for WS-SLTU THT Mini Slide Switch, Opposite Side Connection - its datasheet can be found here: https://www.we-online.com/components/products/datasheet/450302014072_valid_from_2025-10-28.pdf

The only modification I am doing from the already available Button_Switch_THT:SW_Slide-03_Wuerth-WS-SLTV_10x2.5x6.4_P2.54mm library is changing the silkscreen and the courtyard, as the SLTU switch is angled and the SLTV switch is not. Otherwise the SLTU switch has the same recommended hole pattern as the SLTV, here is the recommended hole pattern:
image
Whoever designed Button_Switch_THT:SW_Slide-03_Wuerth-WS-SLTV_10x2.5x6.4_P2.54mm decided to use this recommendation (which sounds reasonable).

I printed my board out on paper to layout-check and noticed that the drill hole size for this slide switch (0.8mm) seems to be a rather tight fit.
Again, from the Wuerth Datasheet, the actual diameter of the pins on the switch is 0.6mm:
image

Alright, so it’s a tight fit, but perhaps my manufacturer can deal with it. Here is what they say (from this site, the manufacturer is JLCPCB):

As far as I understand the footprint uses plated through holes:
image

Therefore, in the worst case I should expect a 8-0.08mm hole, which still is bigger than on the slide switch.

Am I good to go or is there any harm in bumping up the hole size to, let’s say 1.0mm.

May seem like a simple question, but I have no board manufacturing experience to rely upon.

Printing out an PCB is a useful method for checking a lot of things, but it does not have the resolution to judge whether a hole should be 200um bigger or not. The 800um hole size is recommended both by whatever your source was (Datasheet?) and by:

0.8mm should be fine. I suspect it won’t be incredibly tight when you assemble it.

That said, the datasheet value of 0.8mm is indeed a little tight according to IPC hole standards. As the drawing is ISO 2768 “m” tolerance, the max lead size is 0.6 + 0.1 = 0.7mm.

This leaves you only 0.1mm oversizing with a 0.8mm hole, and less if the hole is at minimum size and the lead is at maximum (0.02mm!). But remember the RMS thing from the capacitors - the same principle can be applied if you want.

IPC has multiple conflicting guidelines:

IPC 2222 (for level B, the KiCad normal level):

  • min hole size = 0.7 + 0.2 = 0.9
  • max hole size: 0.5 + 0.7 = 1.2

There is also IPC 7251, which uses a max lead size + constant value. Again for Level B, this is 0.2

  • hole size = max lead size + 0.2 = 0.9

And then in IPC 7352, it’s max lead size + a value, and there are adjustments for board thickness (zero adjustment for 1.6mm boards). There are no levels. For “infinite solder flow” (e.g. hand soldering, but not reflowing, say), and round :

  • hole size = max lead size + 0.4 = 1.1
  • for a rectangular (not square, for some reason) lead, the adjustment is 0.35

So I would say that the Wuerth recommendation here is probably fine, but perhaps a tad small, and would be better as 0.9mm or even 1.0mm. In any case, bumping the size up almost certainly won’t hurt. It’s possible Wuerth knows something we don’t, like the lead tolerance is much smaller that the general tolerance specified. Or they’re just doing it all based on vibes and didn’t think much of it other than “urgh, slap 0.2mm on it and let’s go home, it’s Friday”.

I don’t think you’ll find it doesn’t fit into 0.8mm, and you may find it stays in the board better when you flip it over to solder it in. If the hole is tighter, trying to get it out again for rework might be a bit fiddly. In theory, for some applications, overly tight holes can also make it difficult to meet inspection standards as you can’t see down the barrel from the other side.

For a mechanical element such as this switch, the holes also serve for the positioning of the part. With a 0.2mm nominal tolerance (for all holes) the switch can be rotated:

atan(0.4/5.08)/pi*180 = 4.502

degrees in their holes. This is already quite visible. If you use 1mm holes then the switch can be rotated 9 degrees before the pins bump into the hole walls.

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ISO 2768 does not deal very well with very small sizes. It is very unlikely that the size of the lead varies by 1/3 of its size. But again it can, according to their specification here. Id be more worried about the pitch variation.

Anyway, 0.02 mm sounds like a very tight fit for people who have mostly worked with 3d prints but in reality if one looks at fit tables (like this Types of Fits: How to Choose a Fit for Engineering Application - WayKen) that 0.02 is way way looser than some of the tightest clearance fits by a lot. Even a transition fit would probably not be out of the question for insertion. Not entirely apples to apples though.

Yes, it’s both unlikely the lead actually varies by that much in practice (it’s made of wire and wire is very uniform as a rule) and also unlikely you’d get a worst possible case part and a worst case via hole at the same time. You don’t know what the distribution of the parts within the tolerance, but there’s a very small chance either will be at or near the limits - theoretically 0% that either part will be right on the edge, and square that for both at once. This is the basis of the RMS error accumulation logic in IPC 7351B as described here: Capacitor 1206 footprint: correct for the parts I will be using? - #10 by johnbeard

How you want to handle that probability is up to you and that’s why between IPC’s various documents and Wuerth themselves there are at least 4 different options, even if you limit your concern only to lead tolerance and hole diameter tolerance.

Pitch tolerance is most likely negligible in practice here because the leads are flexible enough to conform to the hole centres anyway. In fact the pitch isn’t specified clearly here, as the dimension is between leads 1 and 3. So it’s not clear what a single pitch may vary by. Many parts have a separate tolerance for the pitch as it’s usually better controlled than the general tolerance, but it’s not so specified here, and neither is the perpendicularity of the lead - ISO 2768 m’s 1%, maybe?

There’s also layer registration tolerances and the drilling position tolerance on top!

It’s an eternal library problem whether we listen to datasheets or apply some common standard (and if so, which one to listen to). Generally to this point, we have made do with:

  • DS is usually OK unless they really seem to have been drafted while on crack
  • Bigger than IPC 2222 minimums if the DS doesn’t say (or looks particularly bogus)
    • IPC 2222 maximums provide a clue for how big the “sensible” window is, but doesn’t say whether you should actually target within the min-max window

And mostly the world hasn’t ended yet!

IPC 7352 is the “new hotness”, but the editorial quality of the standard is utterly dire which does make me wonder about how reliable it is technically. Some of the equations are now outright wrong, in my opinion.

And that’s not limited to the libraries. For example, KiCad’s defaults have quite narrow tracks and annular rings for via’s, which are borderline for the cheap / common PCB pooling services, and that is why I would prefer them a bit more forgiving, so the defaults are easily compatible with majority of these pooling services.

And then you also get into the area of “Board Classes” (See also KiCad’s Calculator tools) Some PCB design programs have libraries with different sized pads depending on this board class. Small pads for “high density” and bigger pads to improve ease of production and reliability for when things don’t have to be so tight.

Thanks, your in-depth responses are much appreciated. I decided to up the hole size to 0.9mm - better to have a PCB that the slide switch is guaranteed to fit, than to not have it fit at all. Good point about the rotatability and its relationship to the hole size, didn’t consider that. A 0.9mm hole diameter increases this

to about 7 degrees. Quite a small increase to guarantee IPC 2222 compilance.

0.9mm sounds like a good plan, certainly can’t hurt.

I wouldn’t sweat the angle. That’s only a concern if you’re not hand assembling with care. When you’re doing it yourself, you do this:

  • fit the part and hold it in place or bend the pins to retain it
  • Tack a pin in one corner as close as you can to square, using the silkscreen outline as a guide. Don’t worry if you can get it dead on yet.
  • Adjust the part into the exact right place (the soldered pin will bend a little to allow this), again using the silkscreen as a guide
  • Solder the opposite pin from the first one. When that joint cools, it should now be in place accurately
  • If it’s still not in place, remelt either pin and adjust it until it’s right
  • Resolder each pin in turn to relieve the tension in them (you may even feel the ping as it melts) and also to top up and reflow the solder if the tack wasn’t perfect. Take care to only melt one pin when the other one is solid again.
  • Solder the rest of the pins

This works for basically everything, including SMD ICs (choose two diametrically opposed corner pins). It’s a lot easier to verify the alignment when you have only one or two pins soldered. Adjusting a fully soldered part can be a hassle, even with hot air.

If your scenario is for few PCAs 0.8, 0.9 or even 1mm is okay. What does it matter? You just have to be careful that the component is properly soldered (i.e. following johnbeard tips) and not tilted (something that bothers me a lot when I see it on many commercial products).

If you’re planning to mount 100, 1000, or more PCA you would need to fit the holes as tightly as possible to minimize hand assembly time/cost. In this case I’d start with the WE recommended Hole Pattern.