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After a system restart, the PCD editor is not showing footprints or copper traces
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2
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280
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May 28, 2025
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Pcb design help
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2
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408
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March 7, 2025
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How to Implement Via Fencing Along an Inclined Trace in kicad 8 in KiCad?
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2
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381
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May 13, 2025
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Documentation beyond routing
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2
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352
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April 16, 2025
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Missing footprint libraries in KIcad 8
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2
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354
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November 23, 2024
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KiCAD v9.0.2 importing hierachical LTspice projects: some bugs
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4
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235
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August 6, 2025
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If sharing diagrams... what is the best approach?
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4
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248
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July 27, 2025
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Electrical Rule Check for one sheet only possible?
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2
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355
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March 21, 2025
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Remove '/' prefix from netnames in spice netlist
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2
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358
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March 10, 2025
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How to add components to schematic programmatically
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3
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289
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July 27, 2025
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Custom rule to disallow certain vias in area not working
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5
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206
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August 18, 2025
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How to snap arc centre to origin
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5
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212
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July 28, 2025
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Unable to Save New Project/Schematic
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4
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233
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June 23, 2025
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Change differential pair dimensions of existing board
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2
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359
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June 29, 2025
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Storing my projects in github - KiCad keeps updating kicad_pro file
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5
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179
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August 5, 2025
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Mosfet Simulation
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3
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328
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July 6, 2025
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Multiple busses from one signal
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3
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281
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April 14, 2025
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France : Nantes ou Bordeaux
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3
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273
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April 14, 2025
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Kicad footprints pad
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4
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217
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August 1, 2025
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Simulate power simbol
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2
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332
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December 18, 2024
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Kicad error (hole clearance, board edge, rear solder mask bridges, etc)
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3
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300
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February 22, 2025
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Need Help Deciphering Layout Specs
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3
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409
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October 23, 2024
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How to Highlight all nets connected to a particular pin
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4
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213
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July 23, 2025
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Is it possible to draw a filled rectangle in drawing sheet editor?
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4
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256
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May 22, 2025
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[SOLVED] Where has Export as SVG moved to in KiCad 9?
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3
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263
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August 1, 2025
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I Want Copper to Copper DRC errors for unconnected copper polygons
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5
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182
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June 4, 2025
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Phantom component on PCB but not schematic
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3
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237
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July 4, 2025
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Tune length incorrect on some tracks
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3
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271
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June 24, 2025
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Installing BS4
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2
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325
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August 10, 2025
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How do I connect my GND copper pour on signal layer with my GND plane on a 4 layer board?
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2
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344
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April 24, 2025
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PCB Editor: how to update a table created with Place -> Add Stackup Table tool
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3
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319
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August 19, 2025
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Adding Net connection in Footprint editor
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2
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347
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July 8, 2025
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How do I make exposed copper?
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2
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370
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April 17, 2025
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Bulk Label/pin paster possible enhancement
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2
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328
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February 16, 2025
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Changed from DIP to SOIC and Pads are all red
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4
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245
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May 22, 2025
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TI AMC1200 PSPICE file incompatibility with KiCad
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3
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298
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June 1, 2025
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PCB Footprints are not coming to layout window while importing from schematic
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4
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257
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July 2, 2025
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Pads and footprints not aligned (large spacing between them in PCB editor)
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2
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332
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February 10, 2025
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Footprint exists and is linked but not found on update PCB
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5
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183
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June 14, 2025
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PI regulator
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4
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228
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August 17, 2025
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DRC bug or am I being silly?
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4
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193
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August 4, 2025
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Standard logic libraries: only DIP footprint filters?
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4
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241
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June 14, 2025
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Is it correct the calculation of Board thickness from stackup?
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3
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255
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August 11, 2025
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How to delete a shared value of serveral selected items?
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3
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309
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June 8, 2025
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Net labels while wiring
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3
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273
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May 27, 2025
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Choose Symbol based on database does not allow filtering
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3
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300
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March 6, 2025
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Inability to Change Track and Via Width in Bulk Editing Mode: Filter Settings Malfunction
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2
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346
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January 6, 2025
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How to show holes in a part's footprint without putting holes in the board?
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2
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338
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December 24, 2024
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Artifacts in Swept Frequency Plot
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4
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248
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July 30, 2025
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Connection between busses
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4
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232
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May 22, 2025
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