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Mask Layer Gerber Completely Wrong!
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20
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1799
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April 16, 2019
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Upgrading from nightly to 6.0 cannot open schematics with version tag 20211123
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19
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1843
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April 7, 2022
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Build KiCad from source on Linux
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11
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2379
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April 16, 2024
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FOSDEM 2023 talks
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17
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1939
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May 3, 2023
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Is there a converse of a net tie?
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14
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2125
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July 22, 2023
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When an image is added to a kicad sheet (.kicad_wks) it's lost during gerber plot
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9
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2604
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May 18, 2022
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Large solid red circle when using custom symbol
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19
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1842
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January 9, 2024
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[Solved] Netlist warning on power pins in a sub-schematic
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11
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2375
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March 7, 2022
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Pin not driven - yet connected
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17
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1939
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April 14, 2021
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How to make holes for jumper wires/probing for a FESTO-like board
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23
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1679
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April 2, 2024
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Why kicad 6.0.5 copper clearance is between via's hole and copper?
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15
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2056
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August 14, 2022
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Question about Edge Cuts
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14
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2122
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June 22, 2023
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Interactive drag segfaults - Debian Linux
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11
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2372
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September 24, 2017
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Friction-fit PTH for Raspberry Pi GPIO?
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15
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2056
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September 11, 2020
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Deleting Redunant Vias
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19
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1838
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April 8, 2021
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Ki-Cad Footprint for TX7-705, TDA21240,IR3897,IR3883MTRBF or IR3823
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11
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2372
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August 15, 2020
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Replicate layout: not replicating
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13
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2195
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July 12, 2021
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KLC Turns Three
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7
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1632
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November 29, 2017
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Importing parts is a pain
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19
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1834
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December 14, 2024
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Installing 5.1 from kicad website for ubuntu getting 4.0.7_dfsg1ubuntu2 package
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16
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1990
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April 9, 2020
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Help to create Gerber file
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14
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2117
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June 8, 2021
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KiCad on Fedora 27 - no python scripting functionality
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9
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2590
|
March 12, 2018
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Gerber plots of mask layers have anomalies
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11
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2362
|
March 11, 2020
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Does DRC check the footprint pads for minimum drill size?
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12
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1276
|
January 23, 2020
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Where can I find a PIC18F4620 symbol?
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9
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2588
|
January 25, 2021
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Negative Component Y Position in CPL File
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14
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2113
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December 26, 2022
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USB Type C, DRC problems
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13
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2187
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August 14, 2024
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(SOLVED) Clearance error using a custom PCB Antenna footprint
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13
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2186
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December 19, 2023
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DRC Control: Error Clearance Violation
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21
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1743
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February 17, 2024
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Import from EAGLE with multiple sheets?
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11
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2359
|
October 5, 2019
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Pcb antenna not being shown on stepfile export
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10
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2462
|
October 19, 2021
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Submitting Gerber with partial footprint outside edge, can i?
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20
|
1781
|
November 30, 2022
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Create Schematic With Separate IC Symbol And DIP Socket
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25
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1601
|
July 20, 2025
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7.0.0-rc1 updates
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12
|
2262
|
April 18, 2023
|
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Consider releasing 6.0.9
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12
|
1271
|
January 25, 2023
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ERC not showing unconnected pin?
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10
|
2458
|
October 25, 2018
|
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Viastitching plugin errors
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14
|
2105
|
February 21, 2021
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Component values showing in silk
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10
|
2456
|
November 8, 2018
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4.0.4 stable is out
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9
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2575
|
September 6, 2016
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Kicad Adafruit Power Booster 1000C
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9
|
2574
|
September 10, 2019
|
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Unable to open the .pcb file
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10
|
2456
|
August 27, 2018
|
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Multiple components with same name but difference meta data
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13
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2176
|
November 8, 2020
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How do I run the /JLC2KiCadLib please?
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11
|
2355
|
April 11, 2024
|
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ERC Pin Problem
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11
|
2349
|
April 28, 2020
|
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KiCad Education and Rage Continues - Symbol Creation
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13
|
2176
|
April 11, 2019
|
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Python: Best way to use pcbnew & reportlab in the same python environment?
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13
|
2175
|
October 31, 2019
|
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Smoothly Placing components
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15
|
2032
|
September 5, 2019
|
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Invalid zero-sized pad pinned to 1µm in file error in footprint file
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13
|
2172
|
June 12, 2023
|
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Bom generation error in 5.99
|
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16
|
1970
|
January 21, 2022
|
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Is there any way to automatically narrow tracks between pads?
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16
|
1972
|
July 18, 2019
|
