[Solved] Netlist warning on power pins in a sub-schematic

I have drawn a schematic using sub-schematics. When everything is connected I will run a netlist check and get theses marks in the sub-Schematic (pins 2 and 4 of D17):


The complementing warning tells me the power and GND pins would not be connected to a power rail.

They are, in fact, but in the root schematic only (being a new user, I may not add a second graphics here…).

How can I resolve these warnings? Am I supposed to put some power source markers in the sub-schematic as well?

Yeah, I read that, but misses the point, I am afraid.

There are power flags on these nets, but in the root schematic. In the meantime I tried adding some in the sub-schematic as well, but that did not solve the issue.

Here’s the spot in the root schematic where one of the incriminated sub-schenmatics is connected:

If you are saying that the +3.3V symbol is a power flag, I think you’ve misunderstood the linked article. The +3.3V symbol merely connects that net to the rest of the +3.3V net, but does not provide a power input pin for the net.

The linked post is telling you to add a specific symbol called PWR_FLAG to the net which provides a power input pin on the net (telling kicad that the net is, in fact, driven by something).

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I see. Thank you for the clarification - I indeed was thinking these flags were the power flags; just with a speaking name to it.

@gkeeth The GND network has to get the very same PWR_FLAG? There is no GND flag or such?

Yes, you should use PWR_FLAG for both ground and power.

Ground and power pins on an IC will both typically be set as “power input” pins in the symbol. ERC checks that any pin marked as a “power input” is connected to a “power output” pin on the same net. The PWR_FLAG symbol is just a dummy symbol, with no footprint, that has a single “power output” pin so that ERC will see the net as driven. I usually put those flags right at the power input connector, if your project has one.

You will not need PWR_FLAGs if power for the net comes from a voltage regulator – the regulator symbol should have its VOUT pin set as a “power output” pin, which satisfies ERC.

P.S. I’m not necessarily suggesting that you do this, but another way to deal with power coming from a connector would be to edit the symbol for your power connector so that the VCC/GND pins are of type “power output”. Then you wouldn’t need the PWR_FLAGs.

Thanks again! :+1:

[unrelated] Next task is to find a SOT-137.1 footprint… :thinking:

According to NXP it’s a SO24.
https://www.nexperia.com/packages/SOT137-1.html

I found a matching footprint as SOIC-24W, SO24 is much narrower although they are claiming it to be the same.

Thanks! :+1:

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