Normal vias vs micro vias
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3
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535
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August 12, 2024
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KiCad 8.0 and Git
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19
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5986
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August 12, 2024
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Tutorial: How to Enable Git in KiCad 8
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5
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12298
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August 12, 2024
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Why so many pads in this footprint?
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5
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920
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August 12, 2024
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Issue with PCBway Fab ONLY PLUGIN
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6
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1186
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August 11, 2024
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How to connect a via to multiple layers?
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36
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3483
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August 11, 2024
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This is maddening
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37
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2338
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August 11, 2024
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Usb type c input and output power delivery
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4
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841
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May 13, 2024
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Antipad size on non-functional layer
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3
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468
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August 11, 2024
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Puzzled by warning messages
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5
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636
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August 11, 2024
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Documenting a schematic
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3
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824
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August 11, 2024
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Würth Inductor models poll
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56
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3201
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August 11, 2024
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"Practically" smallest pin-pitch row of holes for programming and debug
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4
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1229
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August 11, 2024
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Script: name of the net and the connector
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3
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443
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August 11, 2024
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Simple 'reference' EMC test
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4
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491
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May 13, 2024
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Find tracks with a specific width
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20
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1416
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August 11, 2024
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3d Viewer swap axis / Spacemouse?
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1
|
408
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August 11, 2024
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Dialogue of Death
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1
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411
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August 11, 2024
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Export: STEP...: Export Zones: bugs
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4
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1056
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August 10, 2024
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Quick identify tracks don't use net class/custom rule width
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8
|
714
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August 10, 2024
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For what is bridged solder jumper type?
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5
|
900
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August 10, 2024
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STD BUS footprint & card edge
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6
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747
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August 10, 2024
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Edge cut holes not cut through
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5
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868
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August 9, 2024
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NEED HELP! I NEED a cooling system for my Laptop!
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3
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456
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May 11, 2024
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How do i get .step instead of .dcm files for 3d models on kicad 8.02
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3
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594
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August 9, 2024
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4 Layer Board Design Question
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7
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1933
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August 9, 2024
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How can we expend KICAD to chip design
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10
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1650
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May 11, 2024
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Editing a footprint resets the network assignment
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3
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477
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August 9, 2024
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Copper zone hatch pattern origin
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1
|
485
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August 8, 2024
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*.lck File error on startup
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2
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562
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August 8, 2024
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