I hereby certify that I am not simply asking someone else to design a footprint for me.
I was wondering something. There are those chips and transistors thingies with relative large pad surfaces. I found that sometimes the large pads exist out of one large pad and several smaller pads.
This particular thing, an LM317 exist in Kicad in 8 different packages of which one is a soic-8
So my question is as follows: why?
If you load this (TO-252-2) footprint in the footprint editor and then select the F.Paste layer, you see that Pad No 2 has 4 cutouts in the solder paste layer only.
This has at least three purposes. First, such big pads have too much solder if the the paste layer has the same size as the pad (the solder can not flow away or around the pad. Second, by creating channels in the center, this reduces air or flux trapped under the package during footprint placement and soldering.
Note you have to select the F.Paste layer to make it visible, because otherwise KiCad draws the copper over the paste layer, and you do not see it.
In this case, the 4 smaller pads with pad nr 2 could have been “aperture pads”. (Aperture pads do not have copper, do not have a pin number, and only define other technical layers such as paste, adhesive, mask, etc.)
If you look at the bigger QFP’s, then you will often see a bunch of small pads on the paste layer. The ridges in the mask also hold the squeegee flat during paste dispensing. With a big aperture opening the squeegee will dip into the hole, and this increases the variation of solder paste deposited on the pad.
During reflow, the whole pad will be wetted by the solder paste.
Edit, Corrected typo: solder mask → solder paste.
Not cutouts in solder mask but separate holes in stencil openings.
Yes, the stencil. Narrow strips of mask could lift off during soldering
Euhm, yes, but that is not relevant here. the real issue is that you don’t want any soldermask on the big no 2 pad. You want the solder to flow all over it. Also, when there is solder mask between the pad and the IC, the IC will be lifted, the other pins would not touch their pads anymore, and this can reduce yield during soldering and thus result in rework.
