Custom rule hole-to-hole not working as expected
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7
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522
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October 12, 2024
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Can't load PCB after changing colour of value in Layer F.Fab
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11
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608
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October 12, 2024
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Script dash line?
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18
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927
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October 11, 2024
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How to make a pad a thermal relief
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18
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1907
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October 11, 2024
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Just no tutorials on how to do this simple thing
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7
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425
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October 10, 2024
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Is it possible to see Signal Delay per net in Net Inspector?
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5
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495
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October 10, 2024
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Clearance of specific traces from Copper Pour
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2
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535
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July 27, 2024
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Many type of footprint from Ultra Librarian
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5
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1603
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October 10, 2024
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Connecting pins to Ground or Vcc
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10
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1291
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October 9, 2024
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Are multiple copper clearances possible
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4
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453
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October 9, 2024
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Python script for placing micro vias
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12
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742
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October 9, 2024
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Unable to connect track to pads on a specific footprint
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4
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674
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October 9, 2024
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PCB Rogowski Coil
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10
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1732
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October 9, 2024
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Add Microwave Shapes
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7
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1064
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October 8, 2024
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Inconsistent keepout sizes
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7
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423
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October 8, 2024
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Merging Multiple Similar Pads onto one
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5
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794
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October 8, 2024
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How to link footprints to schematic symbols
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3
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2016
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October 8, 2024
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Via size in board and is my design ok?
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4
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777
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October 8, 2024
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Unable to put the grid origin on the footprint origin
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15
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1031
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October 8, 2024
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Pcb automatic track delete
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5
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402
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October 8, 2024
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Use Push Pad Properties to Other Pads
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2
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335
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October 8, 2024
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Board setup - design rules for Pcbway and other questions
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4
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5180
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October 8, 2024
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Unrouted ground is routed
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17
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641
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October 8, 2024
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Custom DRC rules with slots
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8
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986
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October 7, 2024
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Space for courtyard for RC filter and assembly
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14
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1238
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October 7, 2024
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How to go from top to buttom layer?
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10
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1156
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October 6, 2024
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How to route BGA type IC ,XC7A35T
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3
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999
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October 6, 2024
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4 port RJ45
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4
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657
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October 6, 2024
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Custom DRC rules to handle clearance in courtyard
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4
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589
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October 6, 2024
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Updating PCB after minor change moves a big component
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4
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317
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October 6, 2024
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