Jlcpcb plugin
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5
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667
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April 17, 2025
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Where are my default 3D models?
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11
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505
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April 17, 2025
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Custom rules for track clearance and neckdown
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3
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356
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April 17, 2025
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Issue with my net's retnest
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4
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254
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April 17, 2025
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Through-hole component issue
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7
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342
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April 17, 2025
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Simple AC circuit
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9
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1195
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April 16, 2025
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Design Rules to support advanced via properties
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5
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463
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April 16, 2025
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Filled zones not opaque
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4
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202
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April 16, 2025
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Close through-hole holes in step files
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3
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315
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April 16, 2025
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Documentation beyond routing
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2
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301
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April 16, 2025
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Global change footprint properites
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7
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300
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April 16, 2025
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Grouping items
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1
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181
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April 16, 2025
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Annotation Issues With Altium Import
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9
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325
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April 16, 2025
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Same part used twice on board
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9
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349
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April 16, 2025
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KiCad 8.0.7 Symbol Error - MCU_ST_STM32WBA
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6
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1529
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April 16, 2025
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Custom Rule is not applied to DRC
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5
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249
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April 16, 2025
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Trying to get transient analysis to work
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2
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343
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April 16, 2025
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How to tell KiCad that a net is connected INSIDE a component?
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8
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451
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April 16, 2025
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DXF contour import errors
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4
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345
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April 15, 2025
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Converting Altium Libraries to Kicad Libraries
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3
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489
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April 15, 2025
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Simulation error: unknown device type
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7
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468
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April 15, 2025
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Math operations and variables in custom design rules
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1
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252
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April 15, 2025
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DRC rule for islands on paste layer
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3
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285
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April 15, 2025
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Spice simulator library
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5
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717
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April 14, 2025
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Using front and back copper for wide power traces... questions
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8
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4397
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January 15, 2025
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Via stitching generator plugin (on macOS version 8.0.7)
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2
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263
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April 15, 2025
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Schematic design
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9
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326
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January 15, 2025
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Remove thermals from pads
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7
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509
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April 14, 2025
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Multiple busses from one signal
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3
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252
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April 14, 2025
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Component footprints have holes and connectors on each side regardless
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3
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308
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April 14, 2025
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