Design Rules to support advanced via properties

Layout
,
1

Suppose one want to setup a custom via padstack for ultra-highspeed diff-pair netclass, how would one do this?

To my knowledge the custom design rules does not support making netclass dependent padstack settings.

Antipad definitions is a related feature subject which is not featured in KiCad, I could probably make do using via clearance until implemented.

It would also be nice if these settings were somehow available via Board Setup > Design Rules > Net Class GUI , or as a minimum Custom Design Rules

Have I missed something in the documentation?

2

You haven’t missed anything, padstacks (other than simple drill size and via pad size) are not driven by design rules in KiCad

You could make a feature request describing what you’d like to do.

1 Like
3

Created: Design Rules to support advanced via properties (#19588) · Issues · KiCad / KiCad Source Code / kicad · GitLab

4

Is this just a terminology thing? KiCad does not use the term “antipad”, instead it calls this “via diameter” or “clearance” depending on what you mean by it

5

The problem with using via clearance is that when using a padstack with different annular rings on some layers, using clearance yields different effective clearance diameters per layer when per antipad definition one wants this value to be constant through the entire padstack

The last answer by @JeffYoung right on addresses the antipad problem:
Gitlab issue linked above: #19588 (closed)

Moving on defining the greater problem-solution: