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DRC Rule Error After Removing severity from the Design Rule – Rules Disappeared
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5
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246
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June 20, 2025
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Splitting ground plane to an island and the area around the island
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14
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357
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June 20, 2025
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4pdt 12 pin footprint
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3
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290
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June 20, 2025
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DRC warning when connecting SMD pads to Vias
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4
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295
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June 20, 2025
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Multiples of schematic and PCB
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2
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242
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June 20, 2025
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3D model not rendering duplicate component
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2
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208
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June 19, 2025
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Freeze reference names
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8
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257
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June 19, 2025
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Building board incombination with point to point in a vacuum tube amplifier
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6
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280
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June 19, 2025
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Interactive router setting
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14
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505
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June 19, 2025
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Netclass clearance override by custom rules
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13
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485
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June 19, 2025
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Real Time DRC
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3
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351
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June 19, 2025
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Clearance Rule Not Applying to One Specific Footprint
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1
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193
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June 18, 2025
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Help removing errors when updating pcb
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6
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273
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June 17, 2025
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Net class assignment
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3
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223
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June 17, 2025
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PCB Editor Plots Blank PDF Document
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6
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288
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June 17, 2025
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How to cross probe in KiCad 7.0
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13
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409
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June 17, 2025
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Jobsets: Relative paths
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10
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357
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June 17, 2025
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Switching default ShortCuts via Language selection
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3
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178
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June 17, 2025
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Bugs with SVG export
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17
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476
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June 17, 2025
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Bug or feature? Some non-copper layers make via holes visible even when all copper layers are disabled
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4
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210
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June 16, 2025
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Capacitive touch sensor footprint
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7
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392
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June 16, 2025
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Mask Error
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15
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452
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June 16, 2025
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Helping understanding this 2 Pin JST connector datasheet
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6
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722
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June 15, 2025
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Edge Cuts from multiple intersecting shapes outline
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7
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358
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June 15, 2025
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KiCAD 9 New Net Classes not Created with Default Values
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22
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1392
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June 14, 2025
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Unable to connect traces to pads
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2
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219
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June 14, 2025
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Footprint exists and is linked but not found on update PCB
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5
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203
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June 14, 2025
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Move command snapping to different places in different projects
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1
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159
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June 14, 2025
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Pad height in STEP export
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6
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405
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June 13, 2025
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How to exclude the footprint references from the silkscreen
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26
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865
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June 13, 2025
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