Custom Design rules Examples

FAQ
4

Creating a big clearance between net classes in a “High voltage” section and the rest of the PCB

The trick here is to create netclass names starting with a recognizable string (“HV”) and using that in the rules.
Rules are also applied in order, and the thread discusses some of the consequences of that.

(version 1)

(rule "LoW cLeArAnce BeTWeen neTS of THe SAme HV potential"
	(constraint clearance (min 0.2mm))
	(condition " A.NetClass == B.NetClass && A.NetClass == 'HV*' " ))

(rule "HIgH cLeArAnce BeTWeen neTS of dIfferenT HV potentials"
	(constraint clearance (min 5.0mm))
	(condition " A.NetClass != B.NetClass && A.NetClass == 'HV*'  && A.NetClass == 'HV*' " ))

(rule "HIgH cLeArAnce BeTWeen LV And HV neTS"
	(constraint clearance (min 5.0mm))
	(condition " A.NetClass == 'HV*' && B.NetClass != 'HV*'" ))

(rule "Reduced cLeArAnce for HV PoTenTIALS cLoSe To comPonenTS"
	(constraint clearance (min 1mm))
	(condition " A.insideCourtyard('*') && A.NetClass == 'HV*' "))

Forum topic

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