For interfacing with the outside world I create a footprint (type:other) in the project specific library that contains the 3D model of something that is assembled on the board and might collide with other components. During placement I have the 3D viewer open and check after I have placed or moved the part. This is close enough for me.
If a mechanical part is connected with the PCB I will also add the proper mounting holes, cutouts in the footprint. This way I can to plated mounting holes, … where I want them and always have all mounting holes relative to the mechanical part. So my Edge Cuts do not have any holes. If my mechanical engineers adds them to tell me where to place a connector, I will move these holes from Edge Cuts to UserX layer for reference. The real hole always comes from the footprint.
To work with height constraints you can create a step model with the height available (-tolerance) as a thin foil. Adding this the same way as described above will allow you to check if a component can be place a certain position.
Visibility for “other” footprints can be switched on/off in 3D Viewer. So when you have finished placement they can be turned off. Alternatively visibility can be configured by using DNP proporties. There is also a radio button for visibility in 3D-viewer.
Best practise for me is to also define a footprint for PCB and all mech. parts and add this to the schematic. This way I can make sure that they will not accidentially be removed when updating the PCB (depending on settings for update). Also If it’s something like a heatsink you also want this to be in your BOM file as well.
You can do this in the KiCad DRC system without too much trouble, but you do have to write DRC rules. The second example in the DRC rule syntax help is a per-layer netclass clearance rule - you can adapt that for your needs.
The less good thing, except from being quite a mess functionally, it the looks of the DRC/ERC in KiCad. I have not seen it in Altium, but in Eagle it was clean looking and easy to use.
Edit: Just checked a video about Altium DRC, seems very complicated, for no reason in this case, 1000 options in a scary GUI environment and quite unclear how to fix the errors if you don’t want to stay up the whole night to check everything for this simple PCB. KiCad DRC is now wonderful
in altium everything was initially based on design rules. A large number is necessary for complex and multi-board projects. Especially useful when working in a group of developers.
but make sure that those credits have a convoluted pricing model. 1.99 for 70 coins, 3.99 for 170. Each design rule costs 80, so the cheapest option never makes sense! Also make sure that there are no multiples of the coin packets and the things one can buy, so that there are always a few coins missing for the next purchase!
My perspective is that in the mid 1990s televisions still used a tool to punch PCBs but these were still through hole solder wave technology too. Millions were built off of the same tooled PCB. MILLIONS.
Hello:
Altium have some tools for differential tracks.
You can assign: Differential 50ohms, Differential 100ohms to a wire pair. When route the altium will match the large of tracks autmatically and calculate the width and distance automatically.
Is very powerfull, and can be included
I always have the fab house do penalization. I always submit designs as one up. The fab house has tools to do thing “Their Way” which is cheaper for them. I accept back panels with X out boards as it is easy (low cost) for them and I get a chance to evaluate their process. If I received a panle with 75% of the boards X out I would not accept that panel.
I use Altium at work and used it for hobby projects in my free time as well in the past, but I just started to warm up with KiCad for all the obvious Open-Source reasons. If it works well for me our small company is considering changing to KiCad for new projects, now that Altium is upsetting many people with the new licence BS…
So I’m not really accustomed to KiCad yet and still have to get used to a lot of stuff.
That beeing said, my few thoughts:
I do indeed use panalization a lot, to have some specific arangment of small PCBs. Just makes it easier to assemble and reflow them. I actually use it almost exclusively for private projects and sometimes a few prototypes, since all the boards from work for volume are ordered via an EMS and they manage all the overhead for assembly. But I still have to check out this KiKit plugin and see how far it can get me.
You can say about Altium whatever you want (and YES, it is sooo slugish and slow sometimes…) but the GUI of the Design Rule Tool simply is gold. It is really easy to use, even for new users, and you always have good visual representation of what settings you currently are configuring. Same as above, still have to warm up with the KiCad way, but a nice graphic GUI would definitly be more inviting.
I love the new zone manager =)
Full padstacks with complete freedom on every layer is something we would definitely need in a few cases. I’m not far enough in KiCad yet to evaluate how much for the padstacks is already implemented, but there I might have to delay introduction until version 10 is out.
One point were I’m currently really not sure yet how to do it with KiCad projects, is a replacement for the Draftman tool in Altium. We use it excessively for doing all our board documentation in an automated way. Just load in the template, click generate, and out falls a nice PDF with clean instructions for the manufacturer and for our archive. 3D images of the baord, layer stack and via types, prints of all layers, comments to some parts of the baord where special care has to be taken, version history of the PCB and so on, and so on.
You just get this nice pdf with all information compact together, so I get get a quick overview of the projects in 1 year or 3 years or whatever.
Clicking all of this together manually in a word document or something sounds terrible to me. Moving one component on the PCB after I thought the board is finished and I have to redo lots of manual screenshots again and again for every iteration.
How do other people do that? I image a tool like draftman is quite complex and I don’t expect that to be implented in KiCad anytime soon (or not at all), but there have to be other ways?
We actually use KiCad at work for the full development of out project. While it is not on the complexity level of some high end projects, we regulary have >250 components on a single PCB. So far, I did not run into any limitations except stuff that could be automated more to save me some time.
Regarding documentation: This is something we do in a completely different way. We handle the documentation in markdown files in the git repository where the KiCad files are managed
Using (1997-2017) Protel 3 making documentation was “the path through torment” for us and later for me. It was not me who investigated the way how to do it and I was just following the long cheat sheet, but any small error you could see only at the end pdf and the whole work from beginning. It is out of the subject here but the source of all the problems was that vias get always at front of everything hiding element rectangles and references/values and to avoid this we didn’t get PCB pictured directly form PCB project but by exporting gerbers and importing them in a new temporarily opened PCB.
Because of these when moving to KiCad (it was V4 those time) first what I have checked was how to make our files. I shown files we ‘since always’ use in our documentations hare (at the end of long post):
We make two files - one with references and one with values (references for assembly house, values for us if from any reason we have to check something at PCB).
I found those time that to get such pictures as easy as possible I have to have in footprint value and reference at the same layer as the element rectangles so first what I have done was making a footprint library with reference and value at courtyard layer and centered in element rectangle. KiCad V4 and V5 had nothing against it, but since V6 started to complain so I had to disable Courtyard Error.
I would have done this at the other layers but there were no user layer pair I could use for it.
So since than I have all footprints made that way that these texts are by default centered (in Protel I had laboriously move all values and references before making documentation) and I have only to correct them if long (value) text collides with some other.
In V5 I was doing my files by exporting copper, courtyard and my dimensions layers (all with edge-cut included) and mixing them back using Inkscape. Even it was possible to get them directly (but only for top, not for bottom) by modifying layer colors (to black or gary) but getting back to working colors was a problem.
In V8 I switch to documentation color set and can get my files directly from KiCad. The only what I then need Inkscape for is to use 3 hotkeys there. More info here:
I see you need to click “Read more” there to see whole my bug-report.
We are not doing PCB documentation but device documentation and adding pdfs (we were getting from Protel) to file created by LibreOffice Writer was a pain (had to be mixed at pdf level) and then some pages in documentation didn’t followed the whole documentation page style. Since I moved in 2017 to KiCad we use svg files that you can easily insert in LibreOffice file.
