Perhaps I do not understand the question, but here’s the approach I would try:
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Open KiCAD’s Footprint Editor. Start with a basic QFN-28 footprint, such as you find in the KiCAD library.
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Define an SMD pad on the BACK SIDE, with a suitable size. Give it the SAME PAD NUMBER as the top-side thermal pad. It needs to be defined on the back-side mask layer (so it will be exposed), but you will probably EXCLUDE it from the back-side paste layer. You may also want to define a “SOLID” connection to Copper Zones.
- Define a thru-hole pads to serve as “thermal via”. It must also have the same pad number as the top-side thermal pad.
As a practical matter, the amount of annular ring on this pad is irrelevant since the pads will be merged into the larger thermal pad. However, your board fabricator’s DFM software may squawk if the annular ring doesn’t met the requirements for annular rings on all other pads.
- Replicate the pad defined in step 3. (above) as many times as necessary.
You may define each pad individually, or “Duplicate”-and-position (keyboard shortcut ctrl-D ) each pad, or use the “Create Array” feature (ctrl-N).
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Save this footprint with a NEW NAME, in your personal library, so it won’t get over-written the next time you update KiCAD!
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If you will connect the thermal pad to an electrical net in your circuit - such as a ground plane, or power bus - then the component’s symbol in your schematic must include a pin for the thermal pad, and your schematic must show the electrical connection to that pin.
The hole in the thermal vias deserves some attention.
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It must be large enough that your board fabricator can manufacture it. 0.5mm (20 mils) is probably a safe bet for any manufacturer using equipment less than 20 years old. Many fabricators can do 0.35mm (15 mils) on a “standard” order, and you may find a few who will accept jobs with 0.3mm (12 mils) or even 0-25mm (10 mils) holes.
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It is commonly believed that heat transfer from the top side to the bottom side is improved if the holes are filled with solder during manufacturing. I don’t know if there is credible evidence to support this idea.
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Your manufacturing engineer may curse you for even putting the holes there. They certainly suck up solder paste from the top-side thermal pad. That paste may fall through the hole, and make a mess inside the reflow machinery. Providing your manufacturing engineer with a serving of his favorite malt beverage may, or may not, appease him.
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Your board manufacturer may be able to supply boards with the holes already plugged with solder, epoxy, or other material. This is almost certainly an extra-cost option.
The general topic of components with thermal pads has been discussed several times on this Forum. Some of the threads are:
How to add via holes on a thermal pad of QFN footprint?
Pad Holes Under SMT for Heat Sinking and other questions
A help with QFN footprint with thermal vias and solder paste
Creating Exposed (Thermal) Pads
Thermal Pad, Solid vias, Thermal Relief, (complete noob)
Assign a pin to a thermal pad?
Thermal pads, stitching vias and DRC errors
Dale