How to add via holes on a thermal pad of QFN footprint?


#1

I’m making a CP2102 footprint. The first picture is the one in Altium Designer:

But in KiCad, I cannot find how to put a via hole in the footprint editor. In KiCad it’s like this:

I think the via holes is necessary. and I don’t think it can be replaced by a pad with a hole because the bottom layer “filled zone” will make hand soldering hard . So I want to know how to add via holes in footprint editor?


#2

Hi

Try this thread I think it might help you

Basically, you can overlap pads with the same pin number and the KiCad will connect it on your board. So put the via with the same pin number directly over your pad #5 and it should work.


#3

I don’t think the footprint editor will let you add an actual “via”. But you CAN add “pad(s)”, and define them so they look like vias, and work like vias. It always seemed to me that a via was nothing more than a thru-hole pad, but it didn’t have a component soldered to it.

Study the thread that @tdarlic referenced in his post. Some Very Wise people :innocent: expended considerable thought and effort to make that thread a complete and accurate answer to your question. They are deserving of fame and fortune. Bestow praise, honor, and gifts on them in exchange for the valuable knowledge they have imparted to you.

Hand soldering will be difficult no matter how you go about making this footprint. Think about it:

  • The purpose of that big copper island in the middle of the footprint is to conduct heat AWAY from the chip.
  • The vias, pads, thermal conduits, or whatever you want to call the things, are there to improve that thermal transfer efficiency.
  • To form a solder joint with something touching that copper island, you must force more heat INTO the island than can be conducted away from the island, until the added heat raises the temperature to the melting point of solder.

Do you see the fundamental contradiction here? The whole purpose of that copper island is to do the exact opposite of what the soldering process is trying to do. Forget about using hand-soldering techniques to create an effective solder joint with the large thermal pad. Invest in a reflow oven, hot-plate, or second-hand electric skillet that can uniformly heat the whole board at once (as well as all the components on the board) to soldering temperature.

Dale


#4

Thanks Dale

You are correct, I meant pad instead of via.

To corroborate your statement, I have expensive JBC 1000€ + soldering tools and sometimes i have trouble soldering that kind of chips unless I raise the temperature to uncomfortable levels even with the hot air soldering station…

Reflows fine in the oven though…


#5

Dale is correct, done well the thermal pad and vias will defeat your hot air gun unless you also apply heat from underneath


#6

Hm… if I have to unmount/move ICs on a board (3 times so far, always been 2 layer) I put the board in question on a stainless mesh about 2-3 cm above the end of a heatgun and after about 2 minutes the solder on the top becomes fluid. Putting on some liquid flux during the heating helps with oxidation fighting.
Naturally no devices on the underside…


#7

Which is applying heat from underneath


#8

Think you, tdarlic. I’ve read that post. It’s just what I want!


#9

Thanks for help. Your answer about via in that post is really useful. I’ll try to make a PCB to test and verify. And the parts about how to cook a PCB are also good opinions. I’ll think over them.

However I still have a problem. If I put a pad instead a via on a thermal pad, all copper layers, how to make the B.Cu coverd by solder mask like a via? Just tick the B.Mask?


Modeling exposed pads on top of encapsulate
#10

I don’t understand your question. To me, pads and vias are essentially the same things with slightly different functions. The difference between a “pad” and a “via” is very superficial: pads are placed in physical contact with the electrical connection to a component, while a via could be placed anywhere. Most - but not all - vias are NOT placed in physical contact with a component.

Referring to the DPAK footprint I posted at Pad Holes Under SMT for Heat Sinking and other questions , here are the pad definition dialogs for the pads associated with the thermal tab on that package. The pads for your QFN package should be defined in the same way, except for the outline dimensions.

When a pad (or via) is placed in a pad where a component is soldered (such as the thermal tabs we are discussing here), it is important that the back side of the pad (or via) is NOT tented by soldermask! Tenting the hole will trap air inside the hole. During soldering, the air gets heated and expands. If the expanding air can’t escape on the back of the board, it can lift components off the front side of the board and create poor solder joints (or no joint at all). It doesn’t hurt anything if some solder wicks down through the via holes - the solder-plugged holes actually improve both electrical and thermal conductivity through the via.

Dale


Exposed copper pour / fill zones? (pour with no solder mask)
Assign a pin to a thermal pad?
#11

OK. Maybe my English is poor so that I didn’t describe my problem clearly. But in your last section, you answered my question.

This is a small CP2102 board I designed with Altium Designer: (top layer)

The bottom layer is like this:

I just want to ask how to cover the green soldermask on the bottom side and keep the top layer not (because the chip need to be soldered). As you answer, it’s not recommanded.

I still have other questions:

  1. If I must add the green soldermask on the bottom of the pads(vias) in the thermal pad, what should I do? Tick the B.Mask? Is the B.mask mean the green coating?

  2. If I use pads instead vias, look at the second pictrue, can I choose how they connect to the polygon? I mean connect derectly or by “+” connection like the picture. If so, how to choose?

Thank you!


#12

The B.Mask Layer is the negative of the solder mask (green coating). Which means everything that is drawn on this layer results in a hole within this coating.
So if you want soldermask over your pads, you need to untick the B.Mask field in the pad properties.

That is done in the settings of the polygon if you want this connection method you need to make sure that pad connection is selected as thermal relief


#13

Thanks a lot. I’ll try it.