The DPAK footprint I posted at Pad Holes Under SMT for Heat Sinking and other questions - #19 by AmmoMFG shows an example of how I dealt with this problem. The pad definition dialogs for the pads associated with the thermal tab on that package are posted at How to add via holes on a thermal pad of QFN footprint? - #10 by dchisholm . You can look at the *.kicad-mod file in a text editor if you need to dissect all the details down to the molecular level. Bring your critiques, questions, and comments back to this thread for discussion.
(Yeah, the DPAK is a medium-power transistor package, rather than an IC with a thermal pad, but the fundamentals of creating their footprints are essentially the same. Trust me. If you think you need an example of a thermal pad under a “real” IC rather than a transistor package, I have a footprint for an LTC4011 around here someplace . . . but I have learned quite a bit since I made that footprint.)
Dale