I want to create copper pour / fill zones, but have them exposed for better thermal performance - no solder mask. How would I do this?
Set the layer you want to affect (something else than F./B.Cu) with your zone before/after you activated the zone tool - there will be a different dialog pop up that gives you some options.
Sorry, to clarify. I want a standard copper pour which works as net layer connecting tracks / pins. Im trying to create a ground pour, but just donât want this pour to have a mask. How to do this?
You do one zone on either F. or B.Cu layer and you create another zone on the F. or B .Mask layer?
So this is what I have tried:
- selected F.cu, created a copper pour for the ground net that covers the entire board. This works as expected making an âintelligentâ pour only for the zones related to the ground net.
- selected F.Mask and created a copper pour that also covers the entire board. The problem is this mask is not âintelligentâ as it seems to just mask out the whole board. I have inspected with a gerber viewer.
⌠?
Oh⌠uhâŚ
You want the âintelligentâ poured area - and only those - to be without solder mask⌠
I have no idea how to do that, sorry.
I mean, I would have an idea how I would personally try this (manually editing the kicad_pcb file, shortly before creating the gerbers and no further changes are expected), but I wouldnât suggest that, unless youâre really desperate.
PS:
Do you have any guide/info on how much better you are without soldermask?
I was imagining some bigger areas to be soldermask free, and having smaller âislandsâ covered by it⌠but as we donât know how the ground plane looks like itâs hard to say.
A âlittleâ yeah, but the problematic interface is âmaterialâ <-> âairâ anyway. The soldermask is really thin, it wonât really matter, unless you already did all you could and need 1 or 2 deg K per W more for some very special edge case?
Just read up on convection and heat transfer from materials to air⌠surface area counts, turbulence in the flowing medium counts, etc⌠but material properties (especially for thin coatings) will have no influence really (as heat transfer resistance over such short distances doesnât really differ between metal and coatings).
If you wanted you could mount some heatsink onto that copper area, that might help a bit. But as I said, no idea if useful, as we donât know what youâre doing 
interesting info @Joan_Sparky
wasnât planning to add any other heatsinks to the copper, but just use the copper layer as a heatsink as much as possible.
I agree with Joan. The thermal conductivity of copper, and the thermal capacity of copper, is high. For example, copper bottom cooking pans take a long time to heat up because their capacity for heat is so high. And they are uniformly hot across the bottom of the pan. Air layers are thermal insulators, but not paint. And the dark solder mask is a good color for radiating heat.
Also, whatâs wrong with a bare board (generating a zone that omits the solder mask over the entire board?) You would still have bare PCB between copper traces to prevent solder from bridging between traces. Solder mask is often optional, unless you are doing wave or reflow soldering.
Interesting points
yes worried about solder bridges, but perhaps Im being too cautious ⌠Im am doing reflow soldering though
I apologize for bumping this topic up again, as it is rather old, but I was wondering if anyone had solved this problem? A lot of SMT parts now have an âexposed padâ, sometimes called a âpaddleâ that is used for heat transfer. Typically this is âstitchedâ full of vias to improve thermal conductivity. Occasionally a polymer heat-transfer âgap padâ is used to carry heat from the back Cu to a heatsink or the case. In Altium and other programs the solder mask can be omitted from this area. I have been able to draw lines on the back solder mask where I want the mask to be omitted, but they are just lines, not a zone. Trying to draw a filled zone brings up the message that this is only allowed on Cu layers.
Omitting the entire solder mask is (IMHO) bad practice, it not only masks during reflow but provides electrical insulation and protection against debris and to some extent corrosion.
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When I want exposed copper, I just draw lines on *.Mask until the copper I want exposed is covered, there isnât any other way, but honestly itâs not bad or often needed. Am I misunderstanding what you want to accomplish?
Yes, I am contemplating doing it this way as well! I was just hoping there was a better way.
The DPAK footprint I posted at Pad Holes Under SMT for Heat Sinking and other questions shows an example of how I dealt with this problem. The pad definition dialogs for the pads associated with the thermal tab on that package are posted at How to add via holes on a thermal pad of QFN footprint? . You can look at the *.kicad-mod file in a text editor if you need to dissect all the details down to the molecular level. Bring your critiques, questions, and comments back to this thread for discussion.
(Yeah, the DPAK is a medium-power transistor package, rather than an IC with a thermal pad, but the fundamentals of creating their footprints are essentially the same. Trust me. If you think you need an example of a thermal pad under a ârealâ IC rather than a transistor package, I have a footprint for an LTC4011 around here someplace . . . but I have learned quite a bit since I made that footprint.)
Dale
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Very Interesting, thank you. In the end I used lines, setting the line width to be slightly greater than my grid spacing, so the adjacent lines overlapped. This works nicely, and the edges even have a pleasing âfilligreeâ lol. Inspecting it with Gerbview it does seem to have produced the desired effect. But I can see the way of doing it with pads as you describe should work as well. Now I have two ways to get the job done!
Which version is this ?
If you first select the Layer (F.Mask) then Add Filled Zone that works fine as per attached image below. (Zones in F.Mask and B.Mask. as well as zones in F,Cu
(tested in r7066)
What KiCad PCB does not allow, is Menu change of a F.Cu copy, to a F.Mask, or vice versa, tho there seems to be no fundamental database reason for that.
Probably just a menu-simplify decision.
ie I can manually edit .kicad_pcb F.Cu copy, to F.Mask, and it seems quite ok.
I can even manually edit a voided (ie poured) F.Cu shape, to F.Paste, but on doing that, Plot and Save drop the voids within the F.Paste - which I guess is not a surprise.
I like to see where KiCad PCB breaks
Using the Pad shapes to control mask is probably the preferred way, up to the point you need a larger area, or something more heatsink-related, than part related.
Then, a Zone fill on F.Mask (& even F.Paste if you want too) should work fine ?
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I am using 4.0.4 stable. In the footprint editor I donât see any zone fill? The pad approach (and the lines) works, but it is limited. Nice thing is it stays with the footprint and doesnât have to be fixed on the board.
I see now that the zone approach works, but only on pcbnew, and then the zone is apparently fixed?
I appreciate all the suggestions, there are (fortunately) many ways to do this in Kicad, it seems!
Ah, the example I gave was adding zones to the board, which is fine for something large and few.
In what way is it limited?