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Clock signals: short ? or match the propagation delay with other signals?
|
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3
|
565
|
September 1, 2023
|
|
No custom grid with different x and y anymore in 7.99
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15
|
1763
|
November 30, 2023
|
|
Footprint with component on other side
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|
8
|
957
|
November 30, 2023
|
|
[SOLVED] Zone connection through PCB
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15
|
1505
|
November 30, 2023
|
|
Performing steps in PCB editor
|
|
3
|
865
|
November 30, 2023
|
|
Database library - symbol relation not transferred to layout
|
|
4
|
991
|
November 30, 2023
|
|
Oupiin Wire-to-Board Header Connector Footprints
|
|
7
|
959
|
November 29, 2023
|
|
Annular ring pad with multiple connection points (or connection at center)
|
|
17
|
1166
|
November 29, 2023
|
|
How to insert footprint option in EESCHEMA in the symbol selection if there is only the option "No default footprint"
|
|
32
|
1772
|
November 29, 2023
|
|
Uniform colors in PcbNew
|
|
15
|
1283
|
November 29, 2023
|
|
Additional fields in the properties dialog of the selected drawing
|
|
5
|
813
|
November 29, 2023
|
|
Why is my digikey kicad footprints file empty on kicad?
|
|
18
|
1423
|
November 29, 2023
|
|
Adding thermal reliefs to an existing board
|
|
3
|
1103
|
November 28, 2023
|
|
[Solved] Can arcs as of new only start/end on multiples of 45°?
|
|
12
|
641
|
August 30, 2023
|
|
Lost teardrop connection after Fill zone
|
|
2
|
561
|
November 27, 2023
|
|
Global or exportable layer presets in KiCad 7?
|
|
7
|
1135
|
November 27, 2023
|
|
I don't understand how differential routing works (it probably doesn't)
|
|
35
|
3524
|
November 27, 2023
|
|
Activate python console
|
|
2
|
539
|
November 26, 2023
|
|
Splitting off some bad advice
|
|
9
|
956
|
November 26, 2023
|
|
[SOLVED] Individual pad-fill in filled zones
|
|
3
|
465
|
November 26, 2023
|
|
KiCad 7 API Set
|
|
7
|
1038
|
November 26, 2023
|
|
Having problems with assembling files
|
|
11
|
1072
|
February 23, 2024
|
|
Solder Mask cover at via
|
|
3
|
2854
|
September 25, 2023
|
|
PCB Design For Raspberry Pi Project
|
|
4
|
2647
|
November 26, 2023
|
|
[SOLVED] Get no rat's nest on newly created PCB
|
|
9
|
1629
|
November 25, 2023
|
|
[SOLVED] Clearance of copper zone for BGA
|
|
9
|
1353
|
November 25, 2023
|
|
Layers, clearances, etc
|
|
18
|
4063
|
November 25, 2023
|
|
Creating a keepout area in a non-copper zone
|
|
14
|
2946
|
November 24, 2023
|
|
Zone violates minimum width and thermal relief settings
|
|
13
|
1270
|
November 24, 2023
|
|
Reverse engineer pcb to schematic - schematic script
|
|
3
|
1065
|
November 24, 2023
|
