Creating a keepout area in a non-copper zone

Hi, I am creating a flex pcb layout with a layer to indicate the area where a stiffener should be applied. I’m using the User.1 layer renamed as Top Stiffener. According to JLCPCB, they say to indicate the area with a filled shape, so I created a non-copper zone with solid fill. I would like to have some holes in the stiffener, but not sure how to accomplish this. Is there a way to have a keepout area that effects the non-copper zone? I have vias where I want the holes, but they do not seem to effect the User.1 layer. What is the best way to accomplish this? Using KiCad 7.0.6


As a test, I used PCB Editor / Place / Add Filled Zone to place a graphical zone on the F.Silkscreen layer. Then I used PCB Editor / Place / Add Rule Area in an attempt to create a keepout area. However, this does not seem to work for the F.Silkscreen layer. The menu also states the keepouts are only for: “Keep out copper fill”.


I don’t know whether this limitation is intended or not, but your use case does seem a valid use for this.

Ok, thanks for the reply. I don’t absolutely need to have the holes right now, but it would be nice to be able to specify it somehow.

I guess you can draw multiple overlapping rectangles or polygons as a workaround.

Ok thanks, I’m new to KiCad, so I didn’t know you could create filled shapes. It’s not as easy as the above method would be, but it works. For the holes, I used 2 half arcs and lines and converted to two polygons and set them as filled, then used rectangles for the rest of the area.

Another method that may or may not work for you is to draw it in some external CAD program, and then import it as either SVG or DXF graphics.

But the real limitation you are bumping into is that KiCad refuses to draw a keepout in a non-copper zone. I don’t know the reasons behind that, but it may be worth a bug report, but I won’t do that without knowing more about the reasoning behind the current behavior, the Rule area’s have a bunch of features I’m not very familiar with.

I just had (yet another) idea but it seems to be a red herring, the last step apparently does not work the way I expected. But maybe someone else here has a good idea about that.
Keepout (rule) area’s work on a copper layer so I thought about:

  1. Add a set of copper layers to your PCB in the board setup.
  2. Put both zones and rule areas for cutouts on it.
  3. At the final stage, select the (newly generated) zone, right click and Create from Selection / Create Polygon from Selection.

I don’t know whether this limitation is intended or not

Judging by the description string “keep out copper fill” I think it’s currently intended.
Also the layer-list for the rule area is restricted (and can’t reach user.1 layer at all).

So this could be a valid feature request (better two: one for extending the rule-area layers, one for keep out any fill).

I think my feature request would cover this: Add possibility to "knockout layers" to non-copper zones (#3983) · Issues · KiCad / KiCad Source Code / kicad · GitLab

Time to upvote?

EDIT: Mike, if you are signed in to gitlab you can add “thumb up” to vote for it, and you can also add your use case in a comment.

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BTW, meanwhile as a workaround it may be possible to do some tricks by using a copper zone, filling it so that is has the wanted shape and edit the kicad_pcb file to make it a polygon on the wanted layer. I think I can try this later.

I have written a small script which can do this, see Plugin howtos · Wiki · eelik-kicad / KiCad Documentation · GitLab.

Basically you should be able to do it with a copper fill and the saved board file. You can temporarily add a copper zone or even create a new project for this from which you can copy. Add keepout shapes, vias do well for round holes. Fill the zone. Add a simple graphic polygon, just a triangle, to the wanted layer. Save the board file. Now you can open it with a text editor and identify the zone fill and the polygon. The zone includes the outline polygon and the filled polygon. You can just copy the fill coordinates “pts” list and replace the polygon’s “pts” with it. They look something like

      (xy 131.512917 92.106907)
      (xy 131.524729 92.116996)
      (xy 131.666737 92.259003)
    (stroke (width 0) (type default)) (fill solid) (layer "F.SilkS") (tstamp 3676cfb1-8da0-4c9c-b417-dce888e95d11))


  (zone (net 0)...
      (layer "F.Cu")
        (xy 168.417183 96.718907)
        (xy 168.428995 96.728996)
        (xy 168.571003 96.871003)

The last time I had a Flex PCB made was before all this new technology arrived so, reading this Post and it’s leaving me a bit unclear on just what OP wants, I decided to jimmy-up something from previous playing-around work and Ask JCLPCB about how they want Stiffener’s indicated in Kicad.

Here’s the conversation script:

Q: Using Kicad to make FLEX PCB. How to include a Stiffener?

A: please kindly add a isolate file for Stiffener, here are our instruction on generating Gerber in kicad : How to generate Gerber and Drill files in KiCad 7

Q: Please Clarify - what is an Isolate File?

A: I mean add a separate layer for Stiffener only

Q: Should I Rename the Layer to ‘Isolate’ ?

A: no, just name it as stiffener

Q: Do I Draw the Stiffener Shape on that layer with geometry and dimensions I want?

A: yes

This is typical for perhaps most Fab houses and hasn’t changed in decades…
Now, to the Posted PCB question - I’m not clear on what you want but, perhaps it’s something like this screenshot showing a Mask-Zone with Vias…

And, in v7, you can Right-Click a drawn shape and convert/set it to a Zone, DRC-Rule…

Amusing myself… and, has nothing to do with OP’s post but may be of interest… Using FreeCAD’s SheetMetal Workbench to Fold/Bend the Flex-PCB.
Traces/Pads/etc and Parts get lost/hidden (unless user manually re-positions them on the Planes thus, (I did not bother) only the one Chip is shown

Thanks for all the replies. I just realized that the via will likely get filled, so I need to change that to a hole. So I see I’ll need to put a single hole footprint where I want to have a hole. And I still want that hole to go through the stiffener if possible and maybe slightly bigger, which will require one of the above solutions. I think this is common when using through hole components with a stiffener and flex pcb, although my intention is to have a hole for sewing to fabric. I’m not sure if JLCPCB will support holes like this, but I’ll find out.

In case it hadn’t dawned on you… Can either use a ‘Hole’ related footprint or, simply Draw a Hole in the Edge-Cut layer. It should populate through all Layers in fabrication.
You can ensure it happens by Drawing a Circle at location and making a Note on the Stiffener layer using Text…

Here’s a Hole in Edge-Cut layer

Ok, thanks for the tip. I can see a hole in the edge cut layer would be easiest for my situation. Although a site that mentioned putting holes in the stiffener for through hole components suggested making the hole in the stiffener slightly bigger to account for slight mis-alignment, but yeah in my case it wouldn’t really matter. I asked JLCPCB about holes in the stiffener, and they said it’s fine to put the hole in the filled shape on the stiffener layer. I’ve ordered the flex circuit, so I’ll see how it comes out.

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