Hi, I am pretty new into the pcb design and trying to design my first PCB. I used zone fills for grounds but then there exist some pointy-spiky copper fills and I heard this kind of layout may act as antenna and cause some magnetic interference. Is it true that this kind of things can cause problems and if yes how can I get rid of this while using zone fills.
I attached the screenshot and pointed the areas that I am mentioning with green arrows
In my opinion they are not problems provided you short them by via with continuous GND plane at the other layer. Generally in this PCB I would use much more GND vias.
I shown my example of 2 layer PCB here:
It is old design. Nowadays I’m using little smaller vias (0.7 holes I replaced with 0.5 holes).
I have looked at those my old design in context of your question and I see there are still some lacking vias 
Those small stubs are not a problem (until you get into the really high frequency HF stuff). Routing long tracks though the GND panes and cutting them up into little pieces is a huge problem, and a typical beginners mistake. To keep it “simple” for you, and yet effective: just don’t put any hole in the GND plane that is bigger then around 3mm.
Can you elaborate a bit more ? I generally do routing first then grounding at the end what you mean dont put any hole in the GND plane that is bigger than 3mm, hole means vias?
Also what is really high frequency ?
Also my planes are going under the ICs directly maybe it might create a problem as well how can I avoid that ?
Two vias with track connecting them is the reason of hole in GND plane. Longest hole dimension counts.
See my example - there are no tracks at bottom side at all = no holes in GND plane (except one for uC programming pad set).
If you don’t have perfect shield the frequency used by your circuits counts the same as frequency that can come from external. And since we use cellphones frequencies are high and strong and can have source in near proximity to most of electronic devices. Imagine how strong field cellphone have to generate to communicate with base station that can be few km from it.
In most cases more GND is better than less.
You can read about PCB design from EMC point of view in articles I have linked here:
and here:
@paulvdh links from time to time the worth listening speach about grounding at PCB.
I mean my ground fills go under the ICs for no reason and I dont think its good to have a high current ground under a small IC, how can I adjust ground fills so that they dont go under the ICs ?
You want ground under the IC’s.
Assuming that your ICs are connected to ground at some point, it keeps loop currents low.
But - in the image you shared at first, is the blue plane also ground? If so, you need to connect the top and bottom ground planes together with a lot of vias. Especially look at U6 - it looks like you have two pins (1&2) connected to the top plane, but not the bottom. Don’t do that.
A really good reference about the importance and design of GND planes is in the 2hour and 20 minute video from Rick Hartley on youtube: “how to design a GND plane”. It really is so good that anyone who is serious about (digital) PCB design should see it.
“High frequency” is not a clearly defined area. For digital circuits it’s also the risetime that counts, not the signal frequency. Even a microcontroller running at 10MHz has frequency content of several hundred MHz. But as long as your base clock is below 100MHz or so, you use the slew rate limited outputs of your uC, and you don’t make commercial products that have to conform to EMC rules, then you can afford a lot more slack in your design. But it’s always nice to see someone is willing to learn and improve his skills.
I missed (or you didn’t said it) info about high current going through your GND.
In my devices I have currents under 50mA and sometimes several OC outputs that can drive inductive load with may be 1A each. I design GND to not allow these output pulses go near uC (not only under, but near).
To get it I made cuts in GND to route these output current specified by me way, or use 4 layer PCB with my uC at top and my GND at second layer and using bottom layer for these output currents.
Doing this is likely a bad idea.
Increasing the current loop will only make EMI worse.
In the device I have in mind (2 layer PCB) there are high current pulses going through my PCB from (-) supply pin to OC output pin. I have there 32 such outputs so some of them are close to (-) supply but others simply can’t be close to it. There are less than 1s pulses few times a day. These currents do not have return path at my PCB so we can’t speak about current loop at PCB regarding them.
The loop you can consider is from (-) supply through uC to NMOS gate and back from NMOS source to (-). And yes loops are bigger then they could be, but I have 1k resistors between uC outputs and NMOS gates. I am simply more afraid of potential high current pulses going near uC influence on it than the effect of bigger loop having 1k in it.
So do you mean I should keep the tracks in the bottom layer (blue) as short as possible all the time ?
Yes, that’s the idea. But footprint placement is also a very important part of PCB design.
Below a simple example (Unfinished layout).
With the top track, I kept the “dog bone” on the bottom completely within the zone, so GND currents can run around it.
With the bottom two tracks, they are in the corner of a zone, and in that particular area the GND zone is not effective anyway. Also note that these signals are very low speed. They go to an ADC that takes 100 samples per second at most. All zones you see are from different GND zones. This is part of a frontend of several ADC’s with galvanically isolated inputs. It’s not a “typical” digital design.
How should I connect them to the bottom plane ?
If you have both a top and bottom ground plane (or fill), every ground “island” needs to be electrically connected. Just use the via tool and place vias throughout the islands. Unless your circuit is RF (which requires careful layout), you can just try to put a via every cm or so.
How can I be sure of doing a good footprint placement? I am trying to do it as good as possible but its like chess there are infinitely different ways
That’s right.
Usually, common sense works best. Keep functional blocks close together. Unless you are using inductors in a high-frequency circuit, components can generally be placed as close together as you can place them (allowing for routing). Shorter traces are generally better.
Connectors and displays and buttons often need to be placed first.
