I’ve been trying to use the Eagle import in Kicad 5 nightlys. It seems to be working fine at first. I can actually import the boards and after some minor fixes, typically doing some connections where zone margins have missed some ground connections I can even make it pass DRC.
But then if I need to do some modifications, going back to schematic and change some footprints, hell breaks loose. I have a very concrete example:
I’m trying to take this open source board:
https://forum.gmsn.co.uk/t/about-the-pure-vcf/21 (Sorry, I actually linked the wrong project before)
and just exchange a dual 3906 to two 3906 in sot-23 because I don’t have the dual package in my drawers.
- So I’ve imported the board to Kicad
- Pulled some connections and made it pass DRC.
Looks something like this:
- Then I just go back to the schematic and exchange that dual PNP to two 2N3906:
From
to
- Then I go into CvPcb to assign footprints. After annotation of the new Q’s, I get this question:
I’ve only answered Yes so far, but might actually try “No” next time. (No, that really cleared them)
- I assign the new 3906’s footprints but leave everything else:
- Then I generate netlist.
- Read netlist in pcbnew. If I do a test run I get:
No duplicate.
Missing:
COF_CV1 (S_JACK)
CV_AT1 (100K)
COF1 (100K)
IN1POT2 (100K)
Q1 (100k)
2POLE1 (S_JACK)
4POLE1 (S_JACK)
Q3 (2N3906)
Q2 (2N3906)
Not in Netlist:
@HOLE0 () @ 140.251 mm, 61.484 mm
@HOLE1 () @ 140.251 mm, 81.484 mm
@HOLE2 () @ 140.251 mm, 101.484 mm
@HOLE3 () @ 140.251 mm, 121.484 mm
@HOLE4 () @ 140.251 mm, 141.484 mm
2POLE (S_JACK) @ 140.251 mm, 121.484 mm
4POLE (S_JACK) @ 140.251 mm, 141.484 mm
COF (100K) @ 156.751 mm, 121.484 mm
COF_CV (S_JACK) @ 140.251 mm, 101.484 mm
CV_AT (100K) @ 156.751 mm, 101.484 mm
IN1POT (100K) @ 156.751 mm, 61.484 mm
Q (100k) @ 156.751 mm, 141.484 mm
T1 (TRANS_PAIR_PNP) @ 150.406 mm, 74.737 mm
U$1 () @ 140.087 mm, 72.991 mm
U$2 () @ 139.690 mm, 56.957 mm
If I do a dry-run I get:
Info: Reading netlist file “/Users/viktor/Dropbox/electronics/kicad/eagle/gmsn-pure-vcf-2.4/eagle/Pure_VCF_SMD_V2_4.net”.
Info: Using references to match components and footprints.
Info: Checking netlist symbol footprint “2POLE1:/206152FC5DCA2EEB:Pure_VCF_SMD_V2_4:S_JACK”.
Adding new symbol “2POLE1:/206152FC5DCA2EEB” footprint “Pure_VCF_SMD_V2_4:S_JACK”.
Info: Checking netlist symbol footprint “4POLE1:/C7D4C067AA23EF36:Pure_VCF_SMD_V2_4:S_JACK”.
Adding new symbol “4POLE1:/C7D4C067AA23EF36” footprint “Pure_VCF_SMD_V2_4:S_JACK”.
Info: Checking netlist symbol footprint “C1:/A03C925EB189466A:Pure_VCF_SMD_V2_4:153CLV-0505”.
Replacing symbol “C1:” footprint “153CLV-0505” with “Pure_VCF_SMD_V2_4:153CLV-0505”.
Info: Changing component path “C1:” to “/A03C925EB189466A”.
…
Info: Checking netlist symbol footprint “TR2:/D1499554A7E1DB2A:Pure_VCF_SMD_V2_4:TRIMMER_TH3”.
Replacing symbol “TR2:” footprint “TRIMMER_TH3” with “Pure_VCF_SMD_V2_4:TRIMMER_TH3”.
Info: Changing component path “TR2:” to “/D1499554A7E1DB2A”.
Info: Checking netlist symbol footprint “U$3:/F3C0F9832AECCF64:Pure_VCF_SMD_V2_4:SOIC-16_BLANK”.
Replacing symbol “U$3:” footprint “SOIC-16_BLANK” with “Pure_VCF_SMD_V2_4:SOIC-16_BLANK”.
Info: Changing component path “U$3:” to “/F3C0F9832AECCF64”.
Changing footprint “U$3:” pad “15” net name from “” to “Net-(U$3-Pad15)”.
Changing footprint “U$3:” pad “11” net name from “+12V” to “Net-(U$3-Pad11)”.
Changing footprint “U$3:” pad “9” net name from “N$16” to “Net-(U$3-Pad9)”.
Changing footprint “U$3:” pad “8” net name from “N$28” to “Net-(U$3-Pad8)”.
Changing footprint “U$3:” pad “6” net name from “-12V” to “Net-(U$3-Pad6)”.
Changing footprint “U$3:” pad “2” net name from “” to “Net-(U$3-Pad2)”.
Info: Checking netlist symbol footprint “U$4:/C4F885289A709B56:Pure_VCF_SMD_V2_4:SOIC-16_BLANK”.
Replacing symbol “U$4:” footprint “SOIC-16_BLANK” with “Pure_VCF_SMD_V2_4:SOIC-16_BLANK”.
Info: Changing component path “U$4:” to “/C4F885289A709B56”.
Changing footprint “U$4:” pad “15” net name from “” to “Net-(U$4-Pad15)”.
Changing footprint “U$4:” pad “8” net name from “N$44” to “Net-(U$4-Pad8)”.
Changing footprint “U$4:” pad “2” net name from “” to “Net-(U$4-Pad2)”.
If I do the netlist read with this setup:
All pots and jacks loose their positions:
How can I import an Eagle PCB and make small changes to it? I get similar issues with all boards I’ve tried. This one was probably the one with the least problems.