Thermal relief for vias in a filled zone

this subject was discussed at least twice in previous posts.
1 Thermal reliefs for vias
2 Thermal relief on Via in Filled zone

however the following point needs to be added to the discussion. There is some usefulness for thermal relief on vias that are connected to a large ground or power plane. For example when the layer just under the component layer is a ground on the whole board. When there is a return to ground of one of the smd components with very short distance, the smd pad effectively becomes connected to a large heat sink , making hand soldering more difficult. The benefit of the via to ground with no thermal relief is that they provide the lowest inductance to ground. Something that radio frequency designers like and also helps move the heat of the part into the large plane. A thermal relief on a via adds a little more inductance but makes soldering easier as less heat is required and less risk damaging the pad.

The existing menu options appear only to apply to through hole pads. I tried to work around this limitation by creating a 1 pin through hole part but the filled zone keeps filling the ground completely.

Is there a work around possible or should a new feature be added to the many existing menu options?

Use a footprint with PTH pad rather than a via.

There are at least 3 ways which determine whether a thermal relief is used for a pad.
Normally you set it in the zone, but the zone settings can be overridden by the setting in a footprint, and the footprint setting can be overridden by the setting in a single pad. (O at least, I think that is the order, it seems logical).

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If you still can’t get it to work, then simplify a copy of the project, and post a zipped up version here so we can have a look at it.

thank you , creating a component symbol that has a THT footprint places a thermal relief on the plane. It does seem to require that each net that would have the thermal relief needs this special symbol. For a bga that requires 75 grounded nodes with thermal vias , this would require 75 symbols to be placed?

schematic and layout using thermal relief tht

I agree that my workaround is not useful for the application of a BGA. I have to admit, I’ve never seen a BGA fanned out with thermal-connected vias. Are you placing the vias inside the BGA pads?

the return to planes gnd , 1.8v, 1.2v are in between the bga pads.
the design rules and separation between pads permit placing a via there. In many bga cases the heat is dissipated through the leads , so having a via directly connected to a large plane helps with the heat. this particular part has most dissipation from the top , so does not help to have vias directly without thermal relief. the thermal reliefs helps in a different way for the person doing the assembly with low budget equipment doing hand assembly of a prototype. Both for the bga and individual smd parts.

The fanout you show already has a “thermal relief” in a sense between the BGA pad and the via, because you are using “dogbone” fanout. You can control the thermal relief through the thickness of the trace connecting the pad to the via.

While KiCad does not allow you to have thermal reliefs for vias, I also would be surprised if you needed that feature in this application.


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