Schematic and PCB problems after upgrading from V6.x to V7.x

I started a simple project under the last version of V6 (V6.0.11?) around the end of last year and successfully ran schematic ERC and PCB DRC before making two variations of interface boards. The boards were simple, containing mostly connectors and one switch and one resistor. I subsequently upgraded to V7.0 when it became available to keep up with improvements. This upgrade was quickly followed by an upgrade to V.7.0.1 which corrected a component rendering problem in PCB 3D Viewer. Somewhere along the upgrade from V6 to V7.x there appeared a “cascade” of issues with library references, netlists, and perhaps other lost configuration information. Unfortunately I didn’t discover the issues until I tried to modify the schematic under 7.0.1. I’ve researched a number of posts related to V7 upgrade issues people have encountered, however my problem appear to be a superset of various reported problems. While I have dreaded attempting to describe all the details I feel compelled to post my issues in order to understand what happened. Yes, the circuit and board are simple enough to recreate from scratch under V7.0.1 but I hope I can salvage the work and learn something to possibly prevent a future occurrence the next time I upgrade.

As background, Kicad is installed on Windows 10 (pro). After researching guidance and suggested practice with regards to managing personal library entries, I placed all my core library add-ons (symbols, footprints, 3D models) into folders under Documents\Kicad\7.0. My initial setup for Kicad V6.x was under Documents\Kicad\6.0 but then I copied the library entries when upgrading to V7.x. I then added the libraries to the Global Library list using the Manage Libraries function. This certainly worked fine with V6.x and appeared to also carry over as intended when I upgraded to V7.x. However, appearances were deceiving because that’s where the fun began.

While I could view the schematic and PCB after upgrading to V7.x, problems started to surface when I attempted to edit the schematic. I made a small change to the schematic to swap some connector signal assignments and then ran the ERC. The ERC threw warnings for each instance of a new connector indicating “The current configuration does not include the library ‘TerminalBlocks_Weidmuller’”. I was confused because the Library Manager clearly indicated the libraries were in place. Attempts to update the symbol failed with essentially the same error message. I manually deleted the symbols in the schematic and replaced them from the library and the ERC warnings cleared. I was additionally confused as to why only this particular connector symbol was generating the problem. The symbol I also added for a DPDT slide switch did not generate a similar error.

Having cleared the ERC warnings I thought I was good to go so I attempted to update the PCB. Apparently my problems were not over because the PCB wouldn’t update. Not only were there similar issues with the PCB footprint library, but the netlist still seemed to be in error as the rats nest or air wires did not appear. Additionally the previously defined PCB Net Classes were missing so clearly I couldn’t get further with the PCB until I sorted out the remaining schematic errors. However I am at a loss to figure out how to recover from this current state.

I have attached a Word document containing screen shots of these various conditions in the hope that someone can identify where things went wrong and how I might recover. I thought I would start with the screen shots but I can extract additional information I may have glossed over that might be helpful diagnosing the problem
KicadV7.0.1Errors.docx (1.7 MB)
. Any advice would be deeply appreciated.

Post the original KiCad v6 project here and people might be able to help you.

Okay, sorry for the delay getting back to this thread, but there were a number of tasks to get back to the V6 version of the project.

I isolated the last V6 iteration of the project from the backups before converting to V7.0.0 and subsequently V7.0.1. I attached a Zipped copy of the reconstituted project directory for consideration. Note that the current project files are the current state after poking at the V6 project trying to figure out what happened as described below. The start of the latest V6 project before I poked at it is in the backup directory for reference.

After the upgrade to V7.0.0 I removed Kicad V6.0.11 because I’m working with just personal projects (i.e., nothing commercial) and thus it’s just easier for me to keep everything moving along with the latest version. Consequently I had to reinstall V6.0.11 to get everything back to the transition point. For completeness here is the About Kicad info of the V6 install.

Application: KiCad (64-bit)
Version: (6.0.11), release build
Libraries:
wxWidgets 3.2.1
libcurl/7.83.1-DEV Schannel zlib/1.2.13
Platform: Windows 10 (build 19045), 64-bit edition, 64 bit, Little endian, wxMSW
Build Info:
Date: Jan 26 2023 07:02:30
wxWidgets: 3.2.1 (wchar_t,wx containers)
Boost: 1.80.0
OCC: 7.6.2
Curl: 7.83.1-DEV
ngspice: 38
Compiler: Visual C++ 1934 without C++ ABI
Build settings:
KICAD_USE_OCC=ON
KICAD_SPICE=ON

When I attempted to verify the state of the V6 project I was dismayed/concerned that the same error with the Weidmuller Terminal Block schematic symbol and PCB footprint was occurring in the reconstituted V6 version. :man_facepalming: ← this emoji doesn’t begin to express my feelings.

Apparently something happened along the way that not only caused this problem in the upgrade to V7, but seems to have propagated back to the recreated V6 version. I would venture a guess that by reinstalling V6 while I have V7 installed may have caused the “cross contamination” (for lack of a better guess). That aside, at the outset of this particular project I had added two new components to my private library stash in my Documents directory (also attached) and included or added them to the Global Library list. These two components were a through-hole switch and two variants of a through-hole Weidmuller Terminal Block. However only the Weidmuller Terminal Blocks seem to be affected by this MIA phenomenon.

Concentrating on the schematic related issues first, the Weidmuller symbols appear to be in the Symbol Library Manager view of the Global Library list and they also show up in the sym-lib-table located in the Users<username>\AppData\Roaming\kicad\6.0 directory (which I believe is where it should appear). However the Update Symbol and ERC operations initially threw an error that the symbol was missing. When I deleted and replaced the symbol in the schematic the ERC errors cleared. So on this point I would like to understand what the underlying problem was and why simply deleting and replacing the symbol cleared the problem. Moving along, I assumed that clearing the symbol problem would allow me to move to the related footprint issue in the PCB.

When I open the PCB and ran the DRC on the untouched PCB, everything checks out as okay. However, since I made updates to the schematic I tried running the Update PCB from Schematic operation to be proper, but this throws the following errors.

Info: Processing symbol ‘J1:1824440000’.
Info: Processing symbol ‘J2:1824440000’.
Info: Processing symbol ‘J3:1824440000’.
Info: Processing symbol ‘J4:Connector_JST:JST_PH_S4B-PH-K_1x04_P2.00mm_Horizontal’.
Info: Processing symbol ‘R1:Resistor_SMD:R_1210_3225Metric_Pad1.30x2.65mm_HandSolder’.
Info: Processing symbol ‘S1:Button_E-Switch_THT:SW_E-Switch_EG2211_DPDT_Angled’.
Warning: Copper zone on layer F.Cu at (6480.00 mils, 5480.00 mils) has no pads connected.
Error: Cannot update J1 (footprint ‘1824440000’ not found).
Error: Cannot update J2 (footprint ‘1824440000’ not found).
Error: Cannot update J3 (footprint ‘1824440000’ not found).

Info: Total warnings: 1, errors: 3.

If I try to execute Update Footprint it throws an error indicating “footprint not found”. But like the symbol library issue, the Weidmuller Terminal Block appears in the Footprint Library Manager view of the Global Library and likewise in corresponding fp-lib-table file. However, when I open the Footprint Editor for the Terminal Block, the library entry shows up in the list of footprints but there are no specific footprint entries for the 4-position and 8-position Terminal Block that exist in the library directory! (One might exclaim WTF at this point, as I did.).

Well that’s as far as I could take this investigation, but I hope this summary can help someone figure out what happened and how to correct (and more importantly prevent?) this problem. At the risk of creating a mystery novel, I tried to error on the side of more information. I’ve attached two Zip files, one with all the related add-on library information I thought might be relevant, and one with the V6 version of the project.

Thanks in advance for any consideration and help, and please reach out if more information is needed. Hopefully once the underlying problem is identified and fixed I can get this project back on to V7.0.1. While I shouldn’t have to do this, worst case I can start from scratch under V7.0.1.

V6Libraries.7z (132.4 KB)
SingleDeviceCANInterface-KicadV6.7z (271.2 KB)

At least you have this problem:

The Footprint field should be in the format LibraryName:FootprintName. After adding your libraries into Project Specific Libraries it should be changed to this:

Then the PCB can be updated.

Your v6 project does not have a library associated with the footprints. Additionally, the footprints that you attached are named differently in the library than they are in your schematic, so the automatic associate will not work and you need to manually assign the footprints

@eelik, @Seth_h,

Many thanks to you both for providing some independent observations of my situation. I’ve probably been looking at it too closely for too long and had a hard time seeing the forest for the trees, as it were. Every time I stepped away and came back I kept seeing symbol and footprint library files in place and the library references “appeared” to be correct. I just couldn’t see where the disconnect was occurring.

So after spending a lot of time today trying to trace where the disconnects, I believe I found the nature of the problem. Here are the symbol and footprint directories.
image
image
After looking more carefully at the schematic symbol reference anomalies you both pointed out, I noticed a teensy-weensy spelling error in the directory and file names which is the likely suspect in the reference disconnects.


The symbol file name “TerminalBlock…” is singular but the Symbol Properties shows a plural name of “TerminalBlocks…”. I believe I initially labeled the private libraries plural very early in their creation but subsequently corrected it in accordance with Kicad Library Conventions. The footprint .pretty directory has the same spelling error so it probably suffers from the same disconnect.

What I don’t understand is how this disconnect occurred in the schematic and PCB because it was working up until I upgraded to V7.x. Having removed Kicad V6.0.11 after upgrading to V7.x, this issue propagated back to Kicad V6.0.11 somehow during the recreation of the V6 environment. I’m not clear how that happened given I pulled the V6 project (by date) from the archive, but it at least is behaving consistently with the V7.0.1 installation.

More importantly now, I can’t figure out how to correct the spelling disconnect given my foggy state. I need to correct the library references but I’m uncertain what actions to take to back out the incorrect library references and reinstate the current correct library links and names. Do I have to do something like delete the symbols, delete the library links, close Kicad, and then add all that back in? Any suggestions would be appreciated. Also any thoughts of where to look for how the spelling disconnect might have occurred would also be helpful so I don’t do that again.

In the schematic editor, you need to manually assign the correct footprints to your symbols. Then you can update the layout from the schematic.

@Seth_h,

I finally got things sorted out so I wanted to circle back to put closure on this post.

Simply assigning the correct footprints wasn’t possible until I could correct the “TerminalBlocks…” library references for “TerminalBlock…”. The Assign Footprint tool was stuck because it could not see the correctly named library in place. Fixing the symbol library was relatively straightforward in the schematic editor because the majority of the management tools are symbol oriented. However, fixing the footprint library references in the schematic editor was a little more roundabout (at least at first glance).

I couldn’t figure out how to point the Assign Footprint tool to the proper library until I noticed the “Edit the global and project footprint library list” function on the toolbar. Once I corrected the library name references I could update the footprint associations with the symbol. Syncing up the already complete PCB was a snap after correcting the messed up schematic. Subsequently it was easy to fix the V7.0.1 version of the project, which was less messed up than the reconstituted V6 version.

I am still uncertain how the symbol and library name references reverted back to a very early spelling, but I know to look out for that issue. Of course I hope to not make that same spelling mistake in the future now that I am more familiar with the library naming conventions.

Finally, thanks to you and @eelik for just talking through your observations because it led me to see the subtle spelling error. Even when you think you’ve stepped back from the problem, it pays to have some independent observation as a crosscheck.

Many Thanks,
Glenn

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Well, I may have prematurely declared “victory” over my daemons (demons if you prefer). While the previously described actions appeared to fix the library reference issues in the reconstituted V6.0.11 project(s), the same fixes to the V7.0.1 versions were subsequently not quite all there. The V7.0.1 version schematic ERC and PCB DRC were clean, however when I further examined the respective Schematic and Board Setup configurations I noticed the following curious omissions in the Net Classes entries.

The V6 schematic and PCB Net Classes appear as follows and are consistent with the respective designs omitted here for space.


When I examine the equivalent Net Classes configuration in the V7.0.1 version the schematic and PCB net list assignments are missing as noted in the screenshots below.

image
image

Another thing I didn’t initially pickup on was the file type assignments to the Project and Schematic files in the V7.0.1 project directory. They are listed as “V6” files and not V7 or whatever. Not sure why the PCB file doesn’t register a similar version tagging. So I’m wondering is there some conversion step from V6 to V7 that didn’t happen for some reason. I’ve opened, poked at, and closed the V7 project many times so if that was going to happen automatically it would have had plenty of opportunity.

image

I’m not clear about the inner machinations of Kicad, but I thought it curious how the ERC and DRC ran fine but the configuration settings were missing. I guess the rule checks work off of the design files and only have some kind of peripheral(?) relationship to the configuration information…dunno.

Anyway I’m concerned about the discrepancy in the Net Classes configuration that may affect subsequent PCB fabrication; you know, the Project file is “off”. Any thoughts on this (hopefully) final problem of the upgrade saga would be appreciated.

This seems to be Windows File Explorer’s misclassification.

@retiredfeline,
I think you are correct. Looking back at other V6 projects that I haven’t revisited under V7 I noticed the the Windows File Manager labels that only the Project and Schematic files as V6. I suspect because I reinstalled V6 along side V7 to look back at my original issues in this thread that Windows may be tagging those files with the V6 moniker.

I’m about to explore various ways to get the V7 projects in sync with the missing Setup configuration before resorting to uninstalling V7, verifying the V6 projects are whole, and then attempting to (re)upgrade to V7. Fingers crossed.

Hmmm, after some more digging I think I may have found the basis for what confounded me about the Net Classes transition from V6 to V7. While re-configuring my forum search for issues related to Net Classes in V7 I came across these two posts:

I just went back and skimmed the Schematic Editor Reference Manual section on Net Classes as noted in these posts and now see there was a change in how Net Classes are handled now in V7 (patterns, etc.). I didn’t go back to the reference manual after upgrading to V7 foolishly thinking “well probably not that much changed”. In all fairness, I didn’t see anything about changes to Net Class handling in the release notes…but I could have missed that too. Anyway I think answers to my questions about disappearing Net Class entries in the Setup Configuration are probably answered in the updated Schematic and PCB Editor reference manuals. I’ll have to determine what actions I might have to take to make sure my Net Class information is complete, and probably circle back to confirm my suspicion and close this thread.

Like someone a long time ago use to say: RTFM. :man_facepalming:

Well you could have hit me with a soldering iron, but my final bit of V7 upgrade confusion was due to the change in the Net Classes pattern assignment thingy. I was able to easily fix the Net Classes entries in the Schematic and subsequently in the PCB Editors so they properly reflected the circuit.

I say “final bit of V7 upgrade confusion” with tongue-in-cheek knowing full well I have only scratched the surface with a very simple project. At least now I can upgrade to 7.0.2 with some confidence I understand some of the V6->V7 upgrade changes to note.

Thanks again to all that helped with this thread and I hope it provides some insights for someone else that may have encountered similar issues.

I did not read the whole thread. Even your opening post is is quite long, and it only starts describing your problem in the 3rd paragraph.

Your first problem was:

You could have just ignored it. Starting from KiCad V6, schematic symbols are “cached” in the schematic file itself, and it does not matter much whether the library is available or not. You could have fixed it with: Schematic Editor / File / Export / Symbols to new Library and then just made a project specific library (and point the used schematic symbols to that library).

Your biggest problem however was:

At the moment you delete a symbol from the schematic, the connection with the PCB footprint is broken.

About the plural / singular spelling. Whenever I am getting serious about debugging names (especially long path names etc), then I copy both versions into separate lines in a text editor. Any spelling differences then pop out immediately (Including spaces, etc).


Another note:
How did you generate your screenshots? They are both scaled down and in jpg format, and both of those reduce readability. My normal method is to directly paste into the edit window, and then the forum software makes it an .png and big screendumps are scaled down but can be viewed in their original size when clicking on it.

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@paulvdh,
Thanks for taking the time to review my saga and providing more sight into underlying Kicad behavior.

I apologize for the long winded post, particularly the opening, but I’ve read a number of threads where people start off venting and then get chided for not supplying enough details so I didn’t want to be that guy. In hindsight I could have opened with a little less background, so I’ll be a little more judicious on future posts.

It’s good to know that the schematic symbols are cached, but I’m not sure if that would have lead me to finding the symbol library spelling change. In fact I still don’t know how the library spelling reverted to the plural form, but I will do my darnedest to not make such a mistake going forward.

Also thanks for the tip about pasting the library names into a text editor to highlight the potential spelling issue. I guess it never crossed my mind the underlying problem was spelling. I got into a mode where every time I looked at the spelling in various entries, I was seeing what I wanted to see rather than what was actually there. Clearly your tip would have come in handy to expedite the exposure of the spelling discrepancy.

I generated the screenshots by starting with a (Windows) Screen Print but then I pasted them into Paint to crop the screen down to the relevant portion. I thought that would reduce the images in the post in the interest of saving space. This unfortunately had the undesirable side effects of being too small and not scalable. Next time I’ll use your suggestion to paste directly into forum edit window now that I know it takes care of size and scaling so I don’t have to be frugal.

Thanks for all the feedback.

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