Post-v6 new features and development news

[JeffYoung]

Dash-dot-dot line styles and customizable dash/dot lengths.

[JeffYoung]

Custom rules for pad-to-zone connections.

    (rule heavy_thermals
       (constraint thermal_spoke_width (min 0.5mm))
       (condition "A.NetClass == 'HV'"))

    # Don't use thermal reliefs on heatsink pads
    (rule heat_sink_pad
        (constraint zone_connection solid)
        (condition "A.Fabrication_Property == 'Heatsink pad'"))

[JeffYoung]

Starved thermals DRC checking.

Along with a custom rule constraint for same:

    # Require all four thermal relief spokes to connect to parent zone
    (rule fully_spoked_pads
        (constraint min_resolved_spokes 4))

[JeffYoung]

Copper sliver checker.

(Totally contrived example, but you get the idea.)

[JeffYoung]

Solder mask integrity checking.

[JeffYoung]

After running DRC it will also show the effects of any minimum web width on the solder mask.

[JeffYoung]

Mechanical clearance rules. Adds mechanical_clearance and mechanical_hole_clearance to the existing clearance and hole_clearance constraints.

While the later are not run on items of the same net, the mechanical_* versions are.

# Prevent solder wicking from SMD pads
(rule holes_in_pads
    (constraint mechanical_hole_clearance (min 0.2mm))
    (condition "B.Pad_Type == 'SMD'"))

[JeffYoung]

Copper-to-copper clearance checking within a zone, and within a single graphic object.

[JeffYoung]

Dielectric colours in board stackup.

[JeffYoung]

Line styles for PCBNew graphic objects.

[JeffYoung]

All the preferences all the time.

[craftyjon]

@hermit is there a way to restrict this thread to certain posters? It would be nice to follow up on the idea of preventing this thread from turning into a Q&A for every other feature like happened with the last one.

[JeffYoung]

Individual custom rule severities.

    (rule "Via Hole to Track Clearance"  
        (constraint hole_clearance (min 0.254mm))
        (condition "A.Type =='Via' && B.Type =='Track'")
        (severity warning))

[JeffYoung]

Optional drop-shadows for net highlighting.

[JeffYoung]

Assertion constraints in custom rules.

    # Disallow solder mask margin overrides
    (rule "disallow solder mask margin overrides"
        (constraint assertion "A.Soldermask_Margin_Override == 0mm")
        (condition "A.Type == 'Pad'"))

[JeffYoung]

User fields for all label types.

[JeffYoung]

Keep netnames on long tracks in the viewport when possible.

You’re going to have to play with this one yourself; I don’t do video.

[JeffYoung]

User viewports (scroll position and zoom) for PCBNew.

[JeffYoung]

Reset to Defaults for all preference panels.