At one of my last designs I had the issue that the soldermask clearance was bigger than the track/pad clearance.
So parts of the groundplane next of some pads is free of soldermask.
Wouldn’t it be helpful to have a rule to check whether the the soldermask clearance is correct?
Joe
I usually set that to zero, if I don’t forget it. Unless I need to achieve something special.
Doing it this may be unorthodox, yet it seems that most fabs will increase that value to match their process anyway.
I believe there is no “formal rule” for way soldermak, as it is mostly and “artistic and protection” layer but no electronic functional. Some chip fabs specify the soldermask clearance (I believe this is related with soldering and pcb cleaning). So that clearance will also depend from chip to chip, so not possible to have a global rule.
Visually you can use the gerberviewer and/or 3D-viewer.
What I mean is a automated rule in KiCad. I think this could be helpful to be integrated as design rule or at least as hint if you change the clearing parameters.
but how do you make such a rule? what it will check against what?
As I explained, if every different modules can have their own rules (== individual mask clearance) how can it be made global?
If you can tell how the rule checker is supposed to know which copper should be exposed and which shouldn’t?!
Afaik there is no simple rule for that.
Personally I have local pad and local module solder mask clearance at 0 (should be the standard anyway) and then set the global board clearance to 0.05 mm to allow for tolerances of the board house process aligning the solder masks with the copper layers.
How would the rule checker know which copper should be exposed and which shouldn’t?
Hello, I wanted to comment on Joe’s post.
Joe is talking about “solder mask sliver” as most manufacturers call it. It is the small hairs of solder mask that will be left e. g. between IC pads when the solder mask is expanded so it is slightly larger than the pads. This solder mask sliver has a minimum value of ~100um for most manufacturers. If the sliver is <100um, it is too small to be manufactured reliably, forcing them to remove it. It means that there is no solder mask between the pads. The solder paste flows uncontrolled and may short the pads.
On one of my boards the manufacturer came back and warned me about this, wanting to make the pads smaller so the minimum sliver could be maintained.
This was embarrassing as I should have found it myself during DRC. I started searching in the DRC, but I could not find any way of checking for minimum sliver: File/Board Setup…/Design Rules/Solder Mask/Paste
It appears to me that KiCad has no way to check for minimum solder mask sliver. Does anyone know how to check it?
BR
Reidar Gjerstad
I may add that other packages, e. g. Altium have possibility to run DRC check for solder mask sliver. As I remember, PADS has, too.
As much as I like KiCad, having this option would be of great use.
Or perhaps I am just unable to find it.
BR
Reidar Gjerstad
I is rarely useful to add to an 7 year old thread in KiCad, because KiCad has seen a lot of development in such a time frame, and old threads usually are mostly obsolete.
The feature you are looking for looks a lot like:
This is in the Post V6 thread, so only available in KiCad V6.99 at the moment. KiCad’s goal is to have a mayor release about once a year, which implies that KiCad V7 should be released near the beginning of 2023.
