[NgSPICE] Linkwitz-Riley 24 dB Simulation Error

Bab_Bernadet · June 23, 2019, 11:30am

Hi,

I’m trying to simulate a Linkwitz-Riley 24 dB/oct filter with KiCad.
After some researches i’m stuck on NgSPices Errors.
I’ve used the TL072 Spice model provided by texas instrument and i have correctly configured the pin.

I get this errors in NgSpice,

Circuit: KiCad schematic
Background thread stopped with timeout = 0
Reducing trtol to 1 for xspice ‘A’ devices
Doing analysis at TEMP = 27,000000 and TNOM = 27,000000
Warning: singular matrix: check nodes net-c3-pad1 and net-_c3-pad1_
Note: Starting dynamic gmin stepping
Trying gmin = 1,0000E-03 Note: One successful gmin step
Trying gmin = 1,0000E-04 Note: One successful gmin step
Trying gmin = 1,0000E-05 Note: One successful gmin step
Trying gmin = 1,0000E-06 Note: One successful gmin step
Trying gmin = 1,0000E-07 Note: One successful gmin step
Trying gmin = 1,0000E-08 Note: One successful gmin step
Trying gmin = 1,0000E-09 Note: One successful gmin step
Trying gmin = 1,0000E-10 Note: One successful gmin step
Trying gmin = 1,0000E-11 Note: One successful gmin step
Trying gmin = 1,0000E-12 Note: One successful gmin step
Trying gmin = 1,0000E-12 Note: One successful gmin step
Warning: singular matrix: check nodes net-c3-pad1 and net-_c3-pad1_
Warning: Dynamic gmin stepping failed
Note: Starting source stepping
Supplies reduced to 0,0000% Warning: singular matrix: check nodes net-c3-pad1 and net-c3-pad1
Trying gmin = 1,0000E-02 Note: One successful gmin step
Trying gmin = 1,0000E-03 Note: One successful gmin step
Trying gmin = 1,0000E-04 Note: One successful gmin step
Trying gmin = 1,0000E-05 Note: One successful gmin step
Trying gmin = 1,0000E-06 Note: One successful gmin step
Trying gmin = 1,0000E-07 Note: One successful gmin step
Trying gmin = 1,0000E-08 Note: One successful gmin step
Trying gmin = 1,0000E-09 Note: One successful gmin step
Trying gmin = 1,0000E-10 Note: One successful gmin step
Trying gmin = 1,0000E-11 Note: One successful gmin step
Trying gmin = 1,0000E-12 Note: One successful gmin step
Note: One successful source step
Supplies reduced to 0,1000% Warning: singular matrix: check nodes net-c3-pad1 and net-_c3-pad1_
Supplies reduced to 0,0000% Warning: singular matrix: check nodes net-c3-pad1 and net-_c3-pad1_
Warning: source stepping failed
AC operating point failed -
Last Node Voltages
------------------
Node Last Voltage Previous Iter
---- ------------ -------------
net-c1-pad1 1,62715e-35 0
in 0 0
net-c2-pad1 8,15385e-45 -2,86746e-49
net-c3-pad2 1,62715e-35 1,88741e-44
net-r3-pad2 4,07693e-45 0
xu1.11 2,77446e-40 -9,43654e-45
xu1.12 1,95935e-40 1,13628e-49
xu1.6 -2,30489e-39 0
xu1.7 1,62715e-35 7,59072e-54
xu1.53 0 -5,03291e-49
xu1.54 0 -5,03291e-49
xu1.90 1,34256e-40 8,3053e-54
xu1.91 0 -4,15265e-54
xu1.92 0 -4,15265e-54
vee 0 0
vdd 0 0
xu1.99 0 -7,59072e-54
xu1.10 2,98512e-40 -9,43635e-45
xu1.9 0 0
xu1.8 1,62715e-35 0
net-c3-pad1 0 0
net-c4-pad1 0 0
output 0 0
net-r4-pad2 0 0
h.xu1.hlim#branch -3,27706e-52 0
v.xu1.vlim#branch 1,34256e-43 0
v3#branch -1,33895e-43 0
v2#branch 1,98485e-47 0
v1#branch 0 0
v.xu1.vln#branch -1,63853e-52 0
v.xu1.vlp#branch 1,63853e-52 0
v.xu1.ve#branch 1,98485e-47 0
v.xu1.vc#branch -1,98485e-47 0
v.xu1.vb#branch -2,30489e-44 0
a$poly$e.xu1.egnd#branch_1_0 -1,33965e-43 0
doAnalyses: iteration limit reached
run simulation(s) aborted

Any Help will be massively apreciated !
Thank’s in advance !
Baptiste

holger · June 23, 2019, 3:21pm

Please publish the ngspice netlist:
eeschema (after loading a circuit)
Tools->Simulator->Run Simulation
In simulator window
Simulation->Show SPICE netlist

holger · June 23, 2019, 4:13pm

A sneaking suspicion:

Let’s have a look at your netlist.

The TI model TL072.301 has 5 pins (in+, in-, v+, v- and out). However according to the data sheet you will need 8 pins (1in+,1in-, v+, v-,1out, 2in+, 2in-, and 2out) and need calling the opamp model twice. So you cannot use the TI model directly, but need to convert it into a 2-opamp model version, as the TL072 contains two opamps.

A try, using the SOIC8 version:

* A dual opamp ngspice model
.subckt TL072c 1out 1in- 1in+ vcc- 2in+ 2in- 2out vcc+
.include TL072.301
XU1A 1in+ 1in- vcc+ vcc- 1out TL072
XU1B 2in+ 2in- vcc+ vcc- 2out TL072
.ends

Put this into an extra file, e.g. TL072complete.lib and call this file during setting up the SPICE model in eeschema. A small test with standard ngspice is o.k.

TL072 test
.include TL072complete.lib
VP 8 0 10
VM 4 0 -10

Rin1 inp 2 1k
Rfb1 2 1 10k
Vin1+ 3 0 0

Rin2 inp 6 1k
Rfb2 6 7 5k
Vin2+ 5 0 0

XU1 1 2 3 4 5 6 7 8 TL072c

Vinb inp 0 dc 0 sin(0 10m 1k)

.control
tran 10u 10m
plot v(inp) V(1) v(7)
.endc

.end

holger · June 29, 2019, 5:23pm

The procedure is described in the KiCad-ngspice tutorial http://ngspice.sourceforge.net/ngspice-eeschema.html#multi

fbee · November 20, 2020, 7:54am

Hello Holger,

thank you very much for your guidance on how to adapt manufacturer PSPICE models for dual opamp use.

Is there a “generic way” to get dual spice models for eg OPA 1612, 1656 or 1641?

I could make it work with the TL072 , following your description.
I could make it work as well with OPA1656 and TL072 as Spice Model.
But so far , I could not make the OPA1656 Spice Model work with OPA1656

I tried to adapt your TL072-dual.lib for eg OPA1656 (see attachment),
but was not successful. Maybe a syntax error in the dual.lib script or an incompatibility in the manufacturers .lib file?

OPA1656-dual.lib was selected as Spice Model for all three components A,B,C.
Netlist below.
Your advice is much appreciated.

Best Regards;
Frank

0](upload://32NxvQMlk1ppYTfbZ1jWEgSK09R.png)

fbee · November 20, 2020, 7:55am

I m trying to upload netlist and error log

.title KiCad schematic

.include “C:\Users\LX521\OneDrive\Pictures\Documents\KiCad\lib\myLib\OPA1656\OPA1656_PSpice\opa1656-dual.lib”

V1 Net-C1-Pad2 GND dc 0 ac 1 sin(0 3 1k)

V2 15+ GND dc 15

V3 GND 15- dc 15

C2 Net-C2-Pad1 Net-C1-Pad1 330n

C1 Net-C1-Pad1 Net-C1-Pad2 330n

C3 Net-C3-Pad1 Net-C3-Pad2 330n

C4 Net-C4-Pad1 Net-C3-Pad2 330n

R6 Net-C4-Pad1 Net-R5-Pad1 2780

R3 Net-C2-Pad1 Net-R2-Pad1 2780

R2 Net-R2-Pad1 GND 2780

R1 Net-C3-Pad1 Net-C1-Pad1 2780

R4 Net-R4-Pad1 Net-C3-Pad2 2780

R5 Net-R5-Pad1 GND 2780

XU1 Net-C3-Pad1 Net-C3-Pad1 Net-C2-Pad1 15- Net-C4-Pad1 Net-R4-Pad1 Net-R4-Pad1 15+ opa1656

.save @v1[i]

.save @v2[i]

.save @v3[i]

.save @c2[i]

.save @c1[i]

.save @c3[i]

.save @c4[i]

.save @r6[i]

fbee · November 20, 2020, 8:08am

Netlist part 2 and Error Log after AC simulation

.save @r3[i]

.save @r2[i]

.save @r1[i]

.save @r4[i]

.save @r5[i]

.save V(15+)

.save V(15-)

.save V(Net-C1-Pad1)

.save V(Net-C1-Pad2)

.save V(Net-C2-Pad1)

.save V(Net-C3-Pad1)

.save V(Net-C3-Pad2)

.save V(Net-C4-Pad1)

.save V(Net-R2-Pad1)

.save V(Net-R4-Pad1)

.save V(Net-R5-Pad1)

.ac dec 100 1 10k

.end

AC sim error Message

Circuit: KiCad schematic

Original line no.: 0, new internal line no.: 894:

Mismatch: 1 formal but 0 actual params.

gmin=$;

Original line no.: 0, new internal line no.: 894:

Syntax error: letter [$]

Original line no.: 0, new internal line no.: 894:

Expression err: $

Original line no.: 0, new internal line no.: 894:

Formula() error.

gmin=$;

Original line no.: 0, new internal line no.: 895:

Mismatch: 1 formal but 0 actual params.

gmin=$;

Original line no.: 0, new internal line no.: 895:

Syntax error: letter [$]

Original line no.: 0, new internal line no.: 895:

Expression err: $

Original line no.: 0, new internal line no.: 895:

Formula() error.

gmin=$;

Copies=415 Evals=1474 Placeholders=82 Symbols=113 Errors=8

Numparam expansion errors: Problem with input file.

Error: ngspice.dll cannot recover and awaits to be detached

Note: can’t find init file.

** ngspice-33 shared library

** Creation Date: Fri Nov 13 16:44:58 UTC 2020

Error: there aren’t any circuits loaded.

holger · November 20, 2020, 9:45am

fbee, it is not a good idea to occupy an old thread. Consider other users that want to benefit: under the above topic nobody would search and find anything successfully. I guess your design is not a Linkwitz-Riley circuit (whatever that is).

Please open a new topic.

fbee · November 20, 2020, 1:24pm

Hello Holger
indeed, it s a Linkwitz Riley 24dB circuit.
Anyway, I ll open a dew topic
Regards,
Frank