Greetings! First time poster. I tried to perform due diligence and read through the FAQ, but I didn’t find any suggestions that answered my question, so here I am.
I am attempting to simulate a circuit in KiCad 7.0.6. It’s a relatively simple DC/DC converter circuit. At least “simple” from the perspective of not having to deal with an external inductor. The simulation model is another matter. The converter is a TI LMZ12001 (yes, I realize there is a newer TI part but we this is for a course I’m teaching and I’m loathe to have to redo any existing work unless I have to ) and I’m using TI’s unencrypted PSpice model found here. I’ve placed directives (is that the right word?) as text on the schematic to set the initial conditions of my input and output caps.
Unfortunately, when I go to run a transient simulation with the below settings I get a number of errors:
The final error is:
doAnalyses: TRAN: Timestep too small; initial timepoint: trouble with node “xic1.x22.x1.4”
Increasing the timestep several orders of magnitude has no discernible effect. I’ve attached the output of the simulation in case that is of any use. Does anyone have any idea what is going on here? Maybe it’s as simple as these unencrypted models are not meant to work with any other simulators aside from the recently released PSpice for TI?
Externally the circuit is indeed simple, but internally the device is switching heftily into an inductor. Thus converters are often difficult to simulate.
There are some tricks, when simulation converters. Could you zip and post your project here? I would then have a look.
Attached you will find a modified model of the LMZ12001 and a ngspice netlist. As you did not provide the project, I have used standard ngspice.
The simulated output voltage is 5 V (after the setup time of 3 ms), at 4.5 ms the output load switches from 20 to 10 Ohms.
Please check: You need a high time resolution (e.g. 20 ns). With a simulation time 0f 6 ms, there will be a lot of memory required if all data are stored (> 5 GB). Thus the ‘save’ command to reduce the number of nodes stored. Simulation time on my machine is 2.5 minutes. Please also note the .option line with some recommendations for power supply simulation. The input voltage is ramped from 0 to 12 V to avoid any operating point calculation problems. LMZ12001.7z (3.6 KB)
The output voltage and current are
Wow! Thank you, @holger ! Your simulation results agree with a simulation I have been able to run previously in NI’s Multisim tool. Even the long runtime is about what I was experiencing which I suppose makes sense as I was probably using the same model in both applications. I am trying to move away from Multisim and KiCad is excellent for PCB design so I’m hoping I can get it to work for the minimal simulation we do as well.
My apologies for taking so long to respond. I’ll skip the excuses but keep the appreciation. Thank you for your prompt and helpful response!
With that said, I am still unable to reproduce your results. I tried using your modified model, along with your suggested time resolution. To clarify - are you leaving the “Save all voltages/currents” boxes unchecked? I copied the .option line from your netlist and placed it as text on the KiCad circuit but I can’t tell if that is having any effect. I also see the netlist line where you ramp the input voltage but I’m not sure how to reproduce that in KiCad. If there is some documentation I should be reading that would answer all of this for me, please feel free to redirect me.
Finally, I looked at your modified model vs. the original and it looks like the only differences are a handful of zeros added at the end of several lines. What is the purpose of these additions and why were they necessary? Does it have to do with the simulator used (ie pspice, ltspice, ngpsice)?
I’m attaching my project this time for reference. Thanks! LMZ12001KiCadSim.zip (9.3 KB)
Voltage ramping is achieved by a voltage source with pulse option (chapter 4.1.1 and VPULSE symbol from Simulation_Spice library). tr is the ramp, tf does not matter, delay td is zero, pulse width and repeat time are set much longer than simulation time, so just getting a voltage ramp by the leading edge of the pulse.
I would firstly uncheck the ‘save’ boxes and see what I get, then switch them on.
Thanks for the manual link, and for the tip regarding the VPULSE symbol and how to properly configure it. Once I used VPULSE I was able to get the circuit to simulate properly. All of your help and patience is much appreciated!
) and I’m using TI’s unencrypted PSpice model found here. I’ve placed directives (is that the right word?) as text on the schematic to set the initial conditions of my input and output caps.
