Issue with AD633JN multiplier

[Crackers]

Hey,
I am a french student learning electronic (I have o amp theory, not transistors). I have been trying to create my own design of a VCO.
First I wanted to create the signal.
Here’s the Shematic:

I have trouble dealing with the multiplier (AD633JN) , I think that’s him that make the simulation crash like in the pic: ( we see that the signal is going to get good but it crash):
doAnalyses: TRAN: Timestep too small; time = 0.00130097, timestep = 1.25e-17: trouble with node “h.xu1.hlim#branch”

Without it the circuit works perfectly
If you got any advice, solutions to get rid of the issue and to upgrade it: tell me !
(I don’t want to copy a premade circuit but to my own it way)
Sorry for bad english
Thank you for reading,
Crackers.

[retiredfeline]

Sorry, but this forum has to concentrate on the use of KiCad and your question looks like an electronics design question which is not KiCad specific. Unless you are using ngspice in KiCad for simulation, in which case you should edit the category yourself to Schematic with sub-category Simulation (using the pencil icon next to the title).

Otherwise another forum like EEVblog is a better place to ask electronics design questions.

[Crackers]

I changed the category
The problem is the AD633JN that I needed to import from the outside, what multiplier are you using that is working fine ?

[Crackers]

Do you have any multipliers that work?
I have Imported mine, here is the model imported:

• AD633J Analog Multiplier Macro Model
• Description: Amplifier
• Generic Desc: Bipolar, Multiplier, 4 Quadrant
• Developed by: AAG/PMI
• Revision History: 08/10/2012 - Updated to new header style
• 1.0 (12/1993)
• Copyright 1993, 2012 by Analog Devices
• Refer to http://www.analog.com/Analog_Root/static/techSupport/designTools/spiceModels/license/spice_general.html for License Statement. Use of this model
• indicates your acceptance of the terms and provisions in the License Statement.
• BEGIN Notes:
• Not Modeled:
• Parameters modeled include:
• This version of the AD633 analog multiplier model simulates the worst case
• parameters of the ‘J’ grade. The worst case parameters used correspond
• to those parameters in the data sheet.
• END Notes
• Node assignments

•          X1
  

•          |  X2
  

•          |  |  Y1
  

•          |  |  |  Y2
  

•          |  |  |  |  VNEG
  

•          |  |  |  |  |  Z
  

•          |  |  |  |  |  |  W
  

•          |  |  |  |  |  |  |  VPOS
  

•          |  |  |  |  |  |  |  |
  

.SUBCKT AD633J 1 2 3 4 5 6 7 8
*
EREF 100 0 POLY(2) 8 0 5 0 (0,0.5,0.5)
*

• X-INPUT STAGE & POLE AT 15 MHz

IBX1 1 0 DC 2E-6
IBX2 2 0 DC 2E-6
EOSX 10 1 POLY(1) (16,100) (30E-3,1)
RX1A 10 11 5E6
RX1B 11 2 5E6
*
GX 100 12 10 2 1E-6
RX 12 100 1E6
CX 12 100 1.061E-14
VX1 8 13 DC 3.05
DX1 12 13 DX
VX2 14 5 DC 3.05
DX2 14 12 DX
*

• COMMON-MODE GAIN NETWORK WITH ZERO AT 560 Hz

ECMX 15 100 11 100 10
RCMX1 15 16 1E6
CCMX 15 16 2.8421E-10
RCMX2 16 100 1
*

• Y-INPUT STAGE & POLE AT 15 MHz

IBY1 3 0 DC 2E-6
IBY2 4 0 DC 2E-6
EOSY 20 3 POLY(1) (26,100) (30E-3,1)
RY1A 20 21 5E6
RY1B 21 4 5E6
*
GY 100 22 20 4 1E-6
RY 22 100 1E6
CY 22 100 1.061E-14
VY1 8 23 DC 3.05
DY1 22 23 DX
VY2 24 5 DC 3.05
DY2 24 22 DX
*

• COMMON-MODE GAIN NETWORK WITH ZERO AT 560 Hz

ECMY 25 100 21 100 10
RCMY1 25 26 1E6
CCMY 25 26 2.8421E-10
RCMY2 26 100 1
*

• Z-INPUT STAGE & POLE AT 15 MHz

IBZ1 7 0 DC 8E-7
IBZ2 6 0 DC 8E-7
RZ1 7 6 10E6
*
GZ 100 32 7 6 1E-6
RZ2 32 100 1E6
CZ 32 100 1.061E-14
VZ1 8 33 DC 3.05
DZ1 32 33 DX
VZ2 34 5 DC 3.05
DZ2 34 33 DX
*

• 50-MHz MULTIPLIER CORE & SUMMER

GXY 100 40 POLY(2) (12,100) (22,100) (0,0,0,0,0.1E-6)
RXY 40 100 1E6
CXY 40 100 3.1831E-15
*

• OP AMP INPUT STAGE

VOOS 59 40 DC 50E-3
Q1 55 32 60 QX
Q2 56 59 61 QX
R1 8 55 3.1831E4
R2 60 54 3.1313E4
R3 8 56 3.1831E4
R4 61 54 3.1313E4
I1 54 5 1E-4
*

• GAIN STAGE & DOMINANT POLE AT 316.23 Hz

G1 100 62 55 56 3.141637E-5
R5 62 100 1.0066E8
C3 62 100 5E-12
V1 8 63 DC 4.3399
D1 62 63 DX
V2 64 5 DC 4.3399
D2 64 62 DX
*

• NEGATIVE ZERO AT 20 MHz

ENZ 65 100 62 100 1E6
RNZ1 65 66 1
FNZ 65 66 VNC -1
RNZ2 66 100 1E-6
ENC 67 0 65 66 1
CNZ 67 68 7.9577E-9
VNC 68 0 DC 0
*

• POLE AT 4 MHz

G2 100 69 66 100 1E-6
R6 69 100 1E6
C2 69 100 3.9789E-14
*

• OP AMP OUTPUT STAGE

FSY 8 5 POLY(2) VZC1 VZC2 (4.8286E-3,1,1)
RDC 8 5 28E3
GZC 100 73 72 69 11.623E-3
VZC1 74 100 DC 0
DZC1 73 74 DX
VZC2 100 75 DC 0
DZC2 75 73 DX
VSC1 70 72 1.125
DSC1 69 70 DX
VSC2 72 71 1.125
DSC2 71 69 DX
GO1 72 8 8 69 11.623E-3
RO1 8 72 86
GO2 5 72 69 5 11.623E-3
RO2 72 5 86
LO 72 7 1E-7
*

• MODELS USED

.MODEL QX NPN(BF=1E4)
.MODEL DX D(IS=1E-15)
.ENDS AD633J

idk if the problem is there but I have stuck there for quite a long time now.

[holger]

If you have trouble with a circuit containing multiple componenets, then divide and conquer.

Set up a circuit only with the multiplier and check out if the output is was the inputs are requesting.

[Crackers]

That’s what I tried,
When I use 2 sinusoïdal input it works but when I want to combine 1 square with 1 sinusoïdal it crash

[Crackers]

[holger]

What about reasonable rise and fall times and a suitable pulse width?
tr=10u tf=10u tw=1m

[Crackers]

Still the simulation crash. It might be the multiplier model that isn’t good but I took it from analog.com

[holger]

Please zip your project and post it here. I can then have a look.

[Crackers]

it tells me that…
Sorry, new users can not upload attachments.
Here’s the link to access to it trough google drive.

Google Drive: Sign-in

TESTmultiplier is the shematic with only the multiplier
Oscillateur_controle_en_tension is the shematic with the whole circuit as I shared on top of this forum

Models might not be linked well to the file _Components bc I was using a file that was not in the project but in my ‘desktop’ file

[holger]

One has to play a little bit with some simulator options (see ngspice manual chapter 11.1).

Put
.options reltol=0.01
into a text box on the Eeschema canvas.

[jmk]

@Crackers

it tells me that…
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[Crackers]

Tyyy much you are so good

[invntefx]

AD633 ANALOG MULTIPLIER

You should be able to use these example templates I designed as a reference.

AD633.zip (159.8 KB)