First project, can someone look it over?

I routed it myself, except for the connections between the three dip chips on top and their connections. But seeing as I am a beginner at this, I can see how someone confused my traces for the autorouter, if anything looks wrong, tell me, do not be afraid of saying something stupid to me.

I had a link set up, but I was told that people prefer to look at the gerbers, so I edited my first post. Look at the edit history if you want to see the link to the files.

Where would you advise I put them? Like I said, I am a beginner, and it all worked perfectly fine when I set it up on a breadboard without caps.

As I am a beginner, can you please explain to me exactly what the isssues with either of these are? I know that not using T connections was already discussed as just being a bit more personal, Those smaller T connections were before I made this forum post, and almost all boards I had seen avoided right angles, so I thought that there was a reason for avoiding them.

Can you give me some pointer to where that might be?

2 posts were split to a new topic: How to add symbols to Layout

Having the schematic would greatly increase the range of advice that could be given depending on how full of a review someone was willing to conduct. A review based on gerbers alone for instance would never have revealed an addressing conflict.

It would be a good idea to post the schematic as an image or pdf however, to save everyone from having to load your project into Kicad.

You have no idea how common that is. I’m willing to bet that when you wired up your breadboard you used something close to 22 AWG wire. That has a cross sectional area of 0.3mm2 compared to your 10 mil PCB tracks which have an area of 0.009mm2. You also probably wired your power and ground with more of a star topology. So all of your ICs would have had a relatively low impedance connection to the power supply while the impedance on your PCB will be significantly higher. The same circuit on a PCB might not work at all or if it does it might not be very reliable. Your processor might reset every few minutes or hours. It might work fine until you change a piece of code, then you spend hours/days debugging your code when it is the hardware that is at fault. It might even be temperature dependent.

You can google for more information on decoupling capacitors, you can also read this post: https://forum.kicad.info/t/ground-plane-filling-every-space-orphans-solved/5146/22

Forget everything you have ever heard about right angles on a PCB. When people talk about “right angles” they are usually referring to right angle corners, ie “L” shaped corners. While there are technical reasons to avoid “L” shaped corners they don’t apply to most layouts. Most people avoid them because they heard somewhere that they were bad or for aesthetic reasons. If you don’t like the look of right angle corners then miter them with a short 45 degree segment. But the same does not apply to “T” branches. If you are doing a layout where you need to avoid “T” branches for impedance reasons then branching at an angle is not going to help.

As for the vias, they take up more space than a track so it is always a good idea to avoid them. You also don’t want to be hopping from one layer to another any more than necessary.

If you look at your R3 & R2 you see a via next to the resistors through-hole pad. Obviously there is no need for the via. But even the track that connects to R1 switches layers when there is no need. There are several other such tracks. And if you clean some of them up your planes will become a little less segmented.

For a start examine the ground connections for J6, SW1 and J9.

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Link: https://github.com/Marsfan/Bus-Loop-Display/tree/master/Board-electronics

Give me 10 milutes and it will be on OP

@1.21Gigawatts Thanks, I just updated the OP with images of the schematics.

If I understand correctly, I should put a decoupling cap right next to the VCC pin on the atmega, and the caps legs should be between the VCC and GND copper pours. Should I have more decoupling caps anywhere else, and how do I figure out what rating the cap should be?

I will dig around for cleaning up vias and GND planes. Once I figure that out, and find out about decoupling caps, I will post new gerblook links as a reply.

Thanks for pointing that out.

1.- General rule: Do your traces as thick as possible. In your design ¿Is there a reason to make them that thin? No matter that your PCB manufacturer is able to deal with 3 mil traces, make them thicker than that.

2.- Are you going to use wave soldering or hand-soldering instead? The pad’s sizes depend on that. In your design, it seems to be wave-soldering. For hand-soldering the pad’s sizes should be larger (diameter >100 mil, 125mil works well).

3.- There are lot of space unused. Why don’t you fill it with polygons? Maybe for a ground plane.

4.- When possible use vertical traces on the bottom cupper side, whilst horizontal ones on the upper cupper side.

5.- Clearance seems to be ok, but as with traces, the more space among tracks, the better for your design and for your manufacturer’s tests.

Greetings!

I am indeed going to be hand soldering. How do I change the size of the pads.

Here is the new versions of both boards:
http://gerblook.org/pcb/VTpFug7fskXs7v6YPAbF84
http://gerblook.org/pcb/9pbyaXj2RfNMdimQeGQQ5K

Thank you to all for helping me out with this.

@1.21Gigawatts I fixed some of the issues you found, now if you can reply to my post about bypass caps, that would be awesome.

The fastest way is to edit directly the footprint. There you can modify the pad’s sizes according to your needs (as said before, for me pad’s size is ok between 125 and 150 mils).

You can do that as this on your design:

1.- On the Footprint editor create a new component based on an existing one, for example, a LED, and give it a distinctive name.

2.- Back on your PCB, right click on one LED. Then Properties and Change footprint. Choose “Change footprints ‘LED’” (or whatever the LED footprint name has been given). Finally write the name you used on step 1 in the text-box “New footprint (FPID”. And voila! all LEDs footprints has been changed.

3.- Repeat the procedure for all components. Save them all on a common library for being used in the future.

D’oh, I thought of that right after posting.

Some links:
http://www.atmel.com/Images/Atmel-2521-AVR-Hardware-Design-Considerations_ApplicationNote_AVR042.pdf

@Joan_Sparky so from what I gather, I should have a 10uF ceramic capacitornext to my power supply in this case, the power boost 1000c, and a .1uf tantalum capacitor next each vcc pin on any of my ICs? Does that sound right?

Everything suggests using SMT caps, but would there be any issue with using THT caps?

Something like this:

Some more thoughts:

1.- In your microcontroller do no put 1 bypass cap, but 2 instead: one 100nF and one 10nF in parallel.

2.- If you have decided to place a GND plane, make it in both cupper sides; and if you notice not connected isles, connect them with GND traces and repour the polygons.

3.- For GND plane you might use 20 mil clearance.

4.- Power traces should be as thick as possible, even twice from the calculator values.

5.- 90 degrees traces could lead to reflections and manufacturing problems … Think for a moment in a water pipe with 90 degrees corners: the water pressure will decrease with this kind of corners; same with electrons. That’s way 45 degrees corners are prefered.

5.- Traces from the crystal to the microcontroller should be as thick as possible. Also add a ground plane that surrounds the crystal, the caps and the crytal’s pins (check what your microcontroller’s manufacturer has to say about this in the user manual).

Why make both sides GND, why not one VCC and one GND? I know this also makes it a weak cap, helping with filtering.

Will using through hole Caps be ok.

So after digging around a bit, I realized the powerboost and the Bluefruit LE UART Friend, since they are separate PCBs, do not need bypass caps, because they have them built in. As a matter of fact, the bluefruit has a 10uf, then the 3.3v converter, then another 10uf, and finally a 1uf cap, while the powerboost has a 2.2uf and then a 100uf on its power output.

I assume that means my power supply (the powerboost) does not need that separate large cap.

Here are the schematics I used to figure this out:


nano or micro?

I think that you mean paste reflow, not solder wave

Over the years I was putting together a kind of checklist at:
http://www.blunk-electronic.de/pdf/Design_Checklist_en.pdf
It is not only relevant for EAGLE-designs but for general issues as well. I look forward to read your feedback.

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updated to include filtering caps:

http://gerblook.org/pcb/s9wXagboG2kG529cBU73GQ

You generally use a Vcc plane when the current intensity in your circuit is expected to be very high. Besides that, a Vcc plane (aka power plane) is put in the internal layers (for 4 o more layers).

Also, you HAVE NO CONTROL on the capacitor that is created when ground a power planes are used together.

Ground plane helps with parasitics and EMI transmission/radiation.