It actually doesn’t have anything to do with the gnd pin and no assumptions are made about a ground plane, the same rules apply for double sided boards.
Sorry to bud in but there is a lot of misunderstanding surrounding decoupling capacitors and while I’m no expert I thought I would try to help clarify a few things.
Decoupling capacitors are also sometimes called bypass capacitors, they are in fact both and as such they have two jobs to perform.
Decoupling:
Datasheets always state that the placement of the decoupling capacitor should be as close as possible to the Vdd/Vcc (pwr) pin because that is the pin that needs to be decoupled. Consider an output of a high speed bus driver. When that output switches from a low state to a high state it has to source enough current to drive not only the load but the parasitic capacitance and inductance, aka impedance, of the PCB track. This transition takes place in only a few nanoseconds, the rise time, causing a large current demand at the pwr pin. The regulator supplying current to this pin is unable to respond quickly enough to supply the required current, not to mention the impedance of the PCB tracks/planes (PDN) that need to deliver this current to the pwr pin. The result would be a voltage drop at the pwr pin the severity of which would depend on how many outputs toggled simultaneously. This is where the decoupling capacitor comes in. The pwr pin does not connect directly to the power rail but rather to the decoupling capacitor and the capacitor connects to the power rail. During the transient state the capacitor supplies the current to the pwr pin preventing the voltage from dropping. By doing so it effectively decouples the pwr pin from the power rail.
Bypass:
As has been mentioned elsewhere when referring to return paths, the current sourced by the above mentioned bus driver output will take the path of least impedance to ground. For low frequency signals this would be ground at the load as one would expect. High frequency signals however, will return to ground at the “source” of the signal and the route taken will be adjacent to the track carrying the signal where ever possible. This might be a ground plane on the adjacent layer, it might be the power plane on the adjacent layer. In the case of the latter the return signal arrives at the power pin of the bus driver and travels through the bus driver to ground. This is another unwelcome situation. Fortunately the decoupling capacitor that we already have in place provides a low impedance path to ground allowing the current to bypass the bus driver IC.
Hope this helps.