Filled zone cuts corner of mask on square pads

My filled zone ground plane infringes on the solder mask for square pad corners. It’s like the fill cuts the corner to make it round when the corner should be square.

What setting fixes this? I can’t work it out!

I checked in the generated gerbers too. See these pics:

I would guess this is an oversight by the devs. The copper to copper clearance uses rounded rectangles but the mask clearance does not. You could report this as a bug over at the bugtracker:

Not even using rounded rectangles helps out as the mask layer does not use the same center for the arc as the copper clearance.

OK no worries but this is a pretty major bug, no? I’m using version 5, is this new version not quite ready yet?

I’ll report the bug.

It is ready. But with every software there will be some things that have been overlooked during the development time. In this case it is something that can be quite easily replicated so i would guess the fix will be quite minimal effort. (could be totally wrong with this however so lets see.)

If you finish the bug report please link it here.

There might be good reasons why this hasn’t been detected before. Usually the minimum mask clearance of a manufacturer may be something like 0.05…0.1 mm. Some manufacturers advice to make no clearance in gerbers (mask hole size=pad size) and they’ll apply their minimum. But the minimum copper clearance between a pad and a copper fill is probably bigger, and is usually bigger than the minimum anyways. Therefore the mask hole won’t cover the copper fill. Tracks near pads may actually have smaller clearance and could still be a problem. You should find out the minimum or recommended mask clearance of your manufacturer and resize accordingly. You can also try rounded rectangles for pads and see what happens - they may be better in any case.

I tried that. (Described the problem in my first response) Does not fix this issue but might make it less of a problem in some cases.

I can not replicate this issue.

Is it possible it is a setting that is somehow off?

On Edit:
Under settings, change the soldermask “Pads Mask Clearance” to zero.

I didn’t understand the question at first.

Set the net clearance to 0.25 and mask clearance to 0.2 and you will get exactly what i show in my screenshot.
(For the screenshot by OP you will be able to set the difference to something much larger and still see the same effect)

The problem really is that kicad uses a different way to calculate net clearance compared to mask clearance. This means there will be issues. They however only show themselfes in certain conditions. (So large enough mask clearance compared to net clearance)

Why would that be done?
Even if KiCad solder mask outline followed the zone fill, it would leave exposed board material.

No it would not. The mask clearance is still smaller than the net clearance! Read my full post not just part of the last one (and then quote it wrong as well)

Just do the experiment and see for your self. I doubt there will be a setting that does not create any problem at all. (The clearance between mask and copper will always be different around the corners compared to the rest of the pad unless you really set it to exactly 0.)

Under settings, change the soldermask “Pads Mask Clearance” to zero.

OK I hadn’t seen this setting. I’ve set it to 1.5mm as a workaround and it looks OK:

I checked with OSHPark and Seeedstudio and they specify 0.4mm and 0.0508mm respectively.

But what is the expected behaviour here? It seems odd that the solder mask of the pad is square to match the pad but the thin yellow outline of the pad that the fill uses has rounded corners? I think they should both have corners to match the pad itself, right?

Well if the mask alignment is just slightly wrong you will still run into trouble. (There is just not really much clearance between the mask and the copper of the zone) You might really need to increase the net clearance for the pad as well as decreasing the mask clearance

I just found there is already a bug report for this (but might also be the wrong side of things as this seems to be between the mask and the pad it self not to other things):

This is what the solder mask is doing:

What is presented currently, creates a NSMD pad on the fabricated pcb.

I think you misunderstand the whole post.

There is a problem with how kicad currently handles the soldermask and copper clearances. (They are handled differently at the corners creating the danger of exposed copper from a different net there.)
We know that there will be exposed pcb material. The problem is that the copper zone is exposed at the corner and the reason for this is the explaind wrong handling of the two clearances.

Two solutions to the problem are shown in this screenshot.

  • Option 1 (cyan) Use the same center point for the mask rounding as for the copper pad rounding. This would be how the copper clearance is calculated right now.
  • Option 2 (red) Use the mask rounding center as the center for the copper clearance as well.

I think option 1 would be the correct solution.

I actually had this conversation with JP sometime back and he convinced me #1 was not the right solution.

The reason is that the clearances have different purposes. The copper-to-copper clearance is for electrical isolation, so the corner of the zone can be radiused so that the clearance distance is kept constant.

The mask-to-pad margin is to allow for registration errors. Since they occur along either the X or Y axis, you cannot round the corner and still have the same error tolerance.

#2, I believe, is still a runner…

If you look from the pad perspective then maybe #1 is not quite right (at least with the explanation by jp.)
I am not so sure about that. A clearance of 0.1 mm does not mean you can have 0.1mm alignment offset in both x and y direction at the same time. IPC defines it as 0.1mm in any direction (For example 0.1mm at an angle of 45° would be the maximum where both x and y direction are misaligned by the same value. This is less than 0.1mm in both x and y direction)

What is certain is that the current way of doing it is definetely wrong. (The two clearances must use the same way of being calculated!)

@Rene_Poschl Please look at my post, my reply was not to you, but was directed towards the OP. It remains my opinion that, in this case with a through hole part, there is no apparent reason to use a positive solder mask clearance for this pad.

I’ve had ~6 different boards fabbed by the purple board source without any issue with the settings that I have used; but have always hand soldered the parts to the boards.

One important thing you have not mentioned is the different zone settings also need to be “set” to the rules that the board house can manufacture.

This image shows that the zone settings can be set with more clearance than the required distance between the nets.

What I did was to change the zone clearance settings beyond normal, and also changed the global mask setting to a negative value.
This is what it looks like in PcbNew:

The mask layer is a “negative layer”; it shows where the Solder Mask will “not” be applied. This effect can be seen in the 3D viewer:

An advantage to the negative mask (Solder Mask Defined pad) is that the Solder Mask layer is a form of epoxy and can help keep the pads from lifting off the base pcb material.

Note: The Solder Mask should probably remain square in every case as this typically gives a visual indicator of the location of pin 1 on the device.

Well… it also comes down to approach…
The Fill area is etched, so you do not really want a sharp corner there, plus that corner exceeds the clearance so it is excessively conservative. That makes a radius logical.

The Mask area is usually simply a flashed larger pad, so until there was a rounded corner pad, making a rounded corner mask would have been hard to do. Which explains the square corners…

Because the mask-allowance is usually rather smaller than the fill clearance, this subtle corner effect is not usually noticed.
Here, we usually set the fill clearance a notch above the PCB quoted rules minimum, otherwise you create a whole-board expanse of minimums, which is tougher on the PCB FAB, than ‘a few traces pushing clearances’.