Filled zone cuts corner of mask on square pads

I’m not sure the strength edge-on of that epoxy ink counts for much… ?
That said, we have used larger copper areas specifically for adhesion/strength reasons, but there it’s the bigger copper that is what’s helping adhesion, not the thin epoxy ink.

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I have run into this issue also, but I do not anymore since following the advice on https://docs.oshpark.com/design-tools/kicad/ (Kicad default mask expansion is 7.8 mils, on recent Kicad the menu item is Setup > Pads to Mask Clearance)

Setting Mask Expansion

By default, KiCad sets a very large mask expansion, which can allow solder shorts to be added during board assembly. See our Stop Mask Expansion page for a more detailed explanation of the problem.

The mask expansion setting can be adjusted under the menu option Dimensions > Mask Pads Clearance, and then setting the Solder Mask Clearance box. We typically recommend a value of 0.002in (0.0508mm), although the optimal value depends slightly on the design itself.

I find it really really strange that Mask clearance defaults to the same value as Copper clearance.

This means, even without a filled zone, that a 45 degree copper trace near an SMD pad will get exposed even without any registration error (mask offset wrt copper). See below.

Sk%C3%A4rmbild%20fr%C3%A5n%202018-08-13%2010-13-46

I’d suggest at the very least to make Mask clearance default to half the Copper clearance. (Or even taking the rounded copper clearance into account, so that the default Mask clearance=Copper clearance/sqrt5 [~0.09mm], allowing the registration error to be equal in both x and y, and also both positive and negative.)

Will not help much if you consider that the mask clearance is there to protect the pad from misalignment of the mask layer. So lets say you expect worst case 0.1mm misalignment and set the mask clearance to 0.1mm for this reason.
Now with your solution you would use 0.2mm copper clearance. One would expect that no matter what direction the misalignment is that way, nearby copper will always be covered. (Yes to ensure it you would need a bit more than 0.2mm copper clearance but lets ignore that for easier calculations)

With the current way of calculating things you will run into trouble even with this solution:

That is why I suggested Copper clearance/sqrt5. This would of course only be adapted to x/y direction misalignment.

Anyhow, I would expect the default to be such that nothing is wrongly exposed in the case of no misalignment.

even 1/sqrt(5) reduction will still yield in free copper at worst case misalignment :wink:

Well if that can happen, use Copper clearance/sqrt8, default ~0.07 mm :sunglasses:

That is just above the purple recommendation of ~0.05 mm

Goodbye high density boards (The mask clearance is fixed by the fab. So in reality this means that if you are at the minimum there you would unnecessarily need to increase copper clearance just for this bug.)

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I do not mean to use a fixed ratio. I am just talking about the default value.

And i explained that no matter what values you choose the bug is still present. Unless you switch to soldermask defined pads (as suggested by @Sprig). But the industry standard is to use non solder mask defined pads as soldermask alignment is not that precise.


Fabs set the suggested clearances with some assumptions in place. In this case they assume that both copper and mask clearances are calculated the same way resulting in a uniform mask to nearby copper clearance.
This is why they do not give an additional mask to nearby copper clearance (That clearance would normally be fully defined by copper to copper clearance plus pad to mask clearance.)
As this assumption is now broken, the user needs to check that this implicit clearance is fulfilled even on the corners of the pads.

Whatever you decide, it should be very difficult to end up at the situation in my first post with default settings. I already had some PCBs wasted from this setting in version 4:

Could you show a warning in DRC?
Could you have some smart auto calculation?
Or just default to the mask being exactly the pad size?

Your foto shows a different problem then you reported here. In that case the mask clearance is much larger than the copper to copper clearance. (The default for zones is much larger than the mask clearance so you must have changed it from the defaults. Meaning even if the defaults are changed you will not be protected in any way from what you did there.)

It also looks like the fab had some quite large misalignment problem (or the angle the foto has been taken at makes it look that way)

That photo looks bad, yes.

But even if the Copper clearance would have had proper corners, I would argue that having Copper clearance==Mask clearance would be bad. Any misalignment would then expose copper near to the pad. The soldermask does not do its job in that case.

With square corners, Mask clearance = half Copper clearance would avoid that.

I agree. It is however a different problem than originally reported.

Correct. Do I open another bug/wishlist item?

If it does not yet exist then yes.

Your foto shows a different problem then you reported here. In that case the mask clearance is much larger than the copper to copper clearance.

Yes, I know technically it’s a different problem but my point is this: this mask clearance setting is a pain in Kicad. Both my last photo AND my first post are related to this setting. I’m not a developer of Kicad and I’m not an advanced user of any CAD PCB software but I never even thought about or changed this setting in Eagle. I not quite sure how but I think Kicad could smarter here :smile:

No, your first post is really a different problem. No matter what settings you use your first problem is not going to go away. (It might not matter that much any more with different settings. But the underlying problem is still there.)

The second problem however can be solved with correct settings. (So it does not really need developer attention to the same degree then the first reported issue)

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Yes, it seems a change of that default ‘a very large mask expansion’ to the smaller value suggested by PCB FABs, is an easy thing to implement ?
ie 7.8 mil -> 2 mil on the above advice.

Well, it is an accessible setting, but tucked away where I don’t usually look. If in inch measuring mode, if I select this menu item (v5):
2018-08-13%2017_53_47-Pcbnew%20%E2%80%94%20C__Users_chelliot_Dropbox_RemoteDevelopment_KiCad_KiCad5TestNew_KiCad5T

I get this window:
2018-08-13%2017_54_14-Pads%20Mask%20Clearance
And that inches value shows as 0.2mm when in metric measuring mode.

I should personally be checking that on all my designs instead of relying on OSHPark to fix it (especially if I send a board out to someone other than OSHPark…).

Just for chuckles, I just created a new KiCad project with v5. The pad to mask clearance defaults to 0.2mm, but I can’t find that setting anywhere in the automatically generated .pro file nor the automatically generated .kicad_pcb file. Once I change that value in PCBNew and save the board file that clearance setting (along with lots of other board defaults) are saved to the board file. So it seems the 0.2mm is hardcoded in the source code. I haven’t then even tried to figure out where to put my desired default board (and schematic) settings such that it will automatically load. Though, maybe an empty template is the proper place for setting up personal/institutional defaults…