Feedback on my Raspberry Pi Hat design


I would like comments on whether or not the my design for a raspberry pi SPI breakout HAT; actually works.

The board has the following features:

  1. Both SPI buses are broken out to 8 way 0.1in pitch dupont unshrouded headers.
  2. each SPI bus has a switch to switch the working voltage between 3.3V and 1.8.

How it should work:

If the switch is set to 3.3V, the MOSI, MISO, SCLK, CS pins go to a “Quad SPDT Analog Switch” then direct to the 8-way header.

If the switch is set to 3.3V, the MOSI, MISO, SCLK, CS pins go to a “Quad SPDT Analog Switch” then to a “Bidirectional Voltage-level Translator”, then on to the 8-way header. Also the 3.3V from GPIO pins goes to a Voltage regulator.

Also, for protection, there are 100nf caps across the 3.3v & GND and 150 ohm resistors on each of the MOSI, MISO, SCLK, CS pins.

Please let me know if there is anything I could do better; and more importantly, does my design work?

I have attached the schematics and a board image. Both the schematic and board image are licensed: CC BY-NC-SA 4.0

schematics.pdf (205.9 KB)

pcb.pdf (80.9 KB)

Quite bluntly and with all due respect the ground/supply layout is a disaster. Too skinny wires, too many loops, and too many vias. There are also some 90 degree turns to be avoided. Read datasheet(s)!

  • Rip it all up.
  • Lay out larger supply tracks (fill zones?) first!
  • Place bypass C’s according to datasheet.
  • Only then start to lay out signal tracks.

E. g. C5 (bypass) on U5 connects to a signal pin and then from there through two vias to the ground pin. Not good at all. Avoid vias in supply lines as much as possible. If it does not go any other way use multiple vias of sufficient size.

Also suggest teardrop like connections to the pin header holes. Can be a very short thick (1mm or so) piece of track to which the tiny signal track connects. This prevents small tracks to snap from mechanical stress.

and so on…

Edit: with supply lines I meant supply tracks. Fill zones are a different thing.

Correction: Avoid chaining vias. One of the best options for supplying is having inner uninterrupted power planes which of course requires vias.

It would even be fully ok to have ground plane split between top and bottom connected with a lot of stitching vias (top side horizontal connections, bottom side vertical ones. Or the other way round.) This way one gets a reasonable approximation of an uninterrupted power plane. Especially if one takes care to avoid unnecessary splitting of the remaining planes.

Regarding the original question:
I would suggest to invest much more time into finding a component placement that minimizes airwire crossings. I am convinced that the resulting layout will not be as symmetrical as it is now.

Also 3d renderings are nice and all but kind of useless if one wants to really check a layout. (One really needs to see all copper layers at once.)

Sure, should have written supply tracks instead of supply lines.

If those tracks are too skinny no amount of vias can fix that. Only sufficiantly wide tracks and/or fill zones are useful. The ultimate in most cases are extra power layers.

Function over form :slight_smile: Lay out the components in a way which minimizes routing problems, not in a way which looks pretty.

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Before getting hung up with routing issues, lets make sure the schematic is good…

I’m looking at the schematic and I have some questions:

  1. Where are those wires on the first page that go off the page to the right going to?
  2. If as I suspect those wires are going to an off-page sheet object, then I think you could do multiple sheets better. It seems to me that both switch features are electrically identical. If so, you could use two sheet objects on your first page that point to the same file. This is the power of hierarchical sheets. If you are a programmer you can think of hierarchical sheets two ways. If you use global labels (like the ground and power symbols) in the sheets then you can think of them as function calls. If you only use local labels in the sheets then you can think of them as objects. See this FAQ for details: Hierarchical or flat schematic design, what is best for me? (How to deal with multi page schematics?)
  3. What is the purpose of the zero-ohm resistors at the output header? Do you always plan on populating with zero-ohm resistors but didn’t want the nets to merge? If so, using a net-tie symbol and footprint there will reduce your part count by 10 pieces (and reduce your soldering by 20 points). I couldn’t find a FAQ entry on netties, but here are some threads on the forum dealing with netties that might help: Can I connect one pin to two networks? ; 0R resistor implemented as PCB trace ; Net tie, possible bug? (Kicad v5.0.2-1)
  4. I haven’t bothered to look up the datasheet for your Analog switches. But you should verify that it is bidirectional to allow MISO to flow back to the RPi.

And I see some issues that make me think that this circuit won’t do what you think it will.

  1. Looking at the pin names of your analog switch, I see pin names “NO2_1” and “NO2_2” connected to different signals, and no “NC3”. Double check the pin names to make sure you haven’t made a typo when drawing the symbol, or you aren’t using the switch properly. I suspect the typo, but I don’t know that chip. … Hold on… how are you toggling the switch? You have ~EN tied low, but I don’t see a pin name to toggle the flow of signal. If pin 15 is the switch control pin, ~EN is probably the wrong name, and it is permanently tied to ground.
  2. On pin 8 of both of your output headers, you are shorting 3V3 to 1V8 with a zero-ohm resistor instead of letting your switches select the voltage there.
  3. Your labels are long and confusing. It took me a while to understand what goes where, and I may still have gotten it wrong. Hierarchical sheets will help here because it will allow you to make the local labels for the switch circuits shorter than the global labels you are using.
  4. You have wires connected to several pins on the RPi header where you have noconnect symbols. I see why, you are providing names for those unused pins, but it just adds clutter. If you want to document the names for future reference, just use text next to the noconnects and no wires. Or create a custom symbol for the header that includes the pin functions as pin names like you would do for an IC.
  5. This is just a visual issue, but you don’t need to have “show hidden text” turned on. For the symbols you are using that just clutters up the ground and power symbols.

I’m thinking that this circuit is much more complicated than it needs to be. If all you are doing is switching the two SPI interfaces between 3.3V and 1.8V, then all you need is the voltage level translator. Feed the RPi side of the translator the 3.3V of the RPi’s SPI signaling. Then have the switch toggle between the RPi’s 3.3V and the 1.8V of the regulator by connecting the switch common to both the output connector side of the translator and pin 8 of your output connector.

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