DFN Placement Disaster

They are still helpful for manual assembly, rework, debugging etc.

Yes, maybe that wasn’t a very good illustration, but shows that my initial hypothesis that something which doesn’t follow the component outline is pin 1 mark was wrong, and it shows that KiCad libraries don’t follow any logical rule in general. Look at the silk line at the bottom of the footprint. I don’t know why it’s shorter. This footprint really has two pin 1 marks which isn’t necessarily a bad thing, but the 90 deg corner may go on another component’s pad in a cramped design.

But I saw that some DFNs follow a logic as you mentioned.
It should be reset like the others in my opinion.

1 Like

I can report inconsistency in the gitlab section “KiCad Footprints” .
What do you say?

1 Like

That’s a WSON, not a DFN. I think eelik posted it to make another point.

Here’s what the KiCad DFNs look like:
image

1 Like

I say “Yes, please, and thank you!”

Done.
I hope I have explained the problem well.

2 Likes

An erudite big report! :+1:

1 Like

I manually add a pin 1 silkscreen dot for these. It just seems wrong to indicate pin 1 with lack of silkscreen.

3 Likes

in kicad i.e. DFN-8-1EP_4x4mm_P0.8mm_EP2.39x2.21mm.kicad_mod
version 5.1


version 6 and 6.99

IMO kicad v5 was correct and v6 and v6.99 is wrong

1 Like

Personally I haven’t had any issues with this (neither hand assembling or external assembly).

Find 3 sides which are all mirrors of each other, the one which is not is pin 1.

Adding a longer pin 1 is hard on no-lead packages, and would make the silkscreen much bigger than the package itself. Not nice for high density layouts.
The difference between the short and long silk line gets harder to see on a 2x2mm package. Normal silk line vs no silk corner is much easier to see IMO

Exporting fab layer is highly recommended

Related library discussion a while back

The problem does not arise for chips with pins on 4 sides but for those that have two sides where the logic of screen printing is contrary to the logic used in all the other 2-sided chips such as PDIP or SOIC
I realize that for DFN the dimensions are very small.
My opinion is that the new design logic of screen printing confuses ideas.

1 Like

I can understand the reasoning, and especially

Both the new dfn and gullwing definitions follow current industry standards which state that no lead packages use missing silk and gullwing uses extended lines.

But for practical purposes

  1. The industry standards are impossible to find (I tried, and google didn’t find any relevant information about silkscreen markings, IPC standards are not freely available and Rene’s comment was the first one which ever mentioned the information).
  2. Very few people seem the know about the standard. We can’t even expect the assembly personnel to know them.
  3. Ultralibrarian and snapeda seem to use a small dot which has been common in the past. I think this is still the most common de facto pin 1 mark instead of the more recent standards.

When I’m thinking about a “perfect” solution, I might suggest using this “standard” as the base and adding a small corner with a small protrusion outside where a more explicit mark is impractical.

image

image

image

This would be pretty explicit and still follows the standard.

Silkscreen lines should also show the corners of the package somehow. In the current WSON-12 fp they don’t because the bottom line is shorter. I modified so that the line ends show the package corners. Only the pin 1 corner should be different.

1 Like

:frowning: this is why the “next gen” formats are soo important
GERBER-X3, ODB++, IPC-2581 (IPC-DPMX). There is way too much ambiguity.

Kicad at least has X3 support so that is <3 but I havn’t found anywhere in the UK that accepts that into their CAM software (yes a human can view the GERBERS and note the intended rotation so that is a plus).

Nice video from a KiCon… a word from a manufacturer who says “identifying polarity”, including pin 1 marking, is number 1 problem.

3 Likes

I’m one of the librarians, and Rene and I wrote most (all?) of the IPC-7351-compliant footprint generator scripts.

Also, I’m going from memory here…

There was an early IPC-7351C document floating around the internet which captured goals of the C revision. It was from one of the committee members and completely legit. However, in the many, many years that rev C was in committee (and unreleased) the industry began to heavily favor custom packages instead of continuing to use the existing packages for which IPC-7351 already gave fillet goals. This drove IPC to essentially decide that trying to keep a standard which can be used for designing footprints, when the packages that drove the footprints was getting exponentially harder, was intractable. So IPC, for lack of a better term (and being an outsider) gave up on IPC-7351C and later revisions.

There were two rev C things that were incorporated into the KiCad official library’s footprint generators:

  1. Rounded rectangle pads. These were known to be the best pad style long ago, but ECAD software didn’t support that pad shape. So the IPC-7351 series went from rectangle with sharp corners, to oval/oblong, to rounded rectangle in rev C. This was because the ECAD software had caught up and commonly supported this pad shape in the time frame when rev C was meant to be released.
  2. Silk indicators for pad 1. The early rev C document showed heavy use of silk removal for pad 1 indication. In my professional life, I had also come across this issue because packages were getting smaller, boards were getting more dense, and minimum silk line widths were dropping (at least, with the cheaper squeegy-style of printing). This meant that silk removal, rather than silk addition, was an easier way to capture pad 1 location on ‘modern’ boards.

The official footprint library follows those conventions above. While individual users are certainly free to have their own preferences, and the footprint generators are available for modification, Wayne has said that KiCad is targeted at ‘professional’ users and for that audience IPC is an industry standard that the industry can leverage. This means design engineers, technicians, manufacturing engineers, quality engineers, factory repair, field service, etc.

If the current footprint style doesn’t work for you, that’s OK, and the librarians are trying to make symbols and footprints for any and all KiCad users. Hopefully the library is high-quality and works for everyone. But sometimes it doesn’t. And the librarians are human and make mistakes too. I’m only trying to explain where this came from (since that’s missing above) and say that discussion is welcome. Though, I hope it’s quite understandable that in the end some decision has to be made and I believe strongly that the librarians always worked hard to make the best choices with the information available when a decision needed to be made. Hopefully that’s clear when looking at the library as a whole, taking into consideration that nothing is perfect.

Another thing is that the early rev C document I refer to was scrubbed from the internet when IPC decided not to pursue finishing and releasing rev C. So that further obscures finding the source material from which the library conventions were made.

And lastly, not all footprints were ported over to the new generators. And not all packages have an entry in IPC-7351. So for that reason, you will still see a mix of styles in the official footprint library.

I hope this helps in some way. I didn’t see any real explanation above and that is what I recall. Cheers!

9 Likes

Than you very much for commenting and clearing things up. Your post even includes non-KiCad specific information not found anywhere else in the internet, I think.

I’m not going to try convince anyone to change the libraries, but maybe it’s still worth thinking about some viewpoints.

On the other hand

So KiCad tries to follow a standard which actually isn’t a standard.

I would like to know how many of those “professional” users who want to follow all possible standards use the KiCad libraries unmodified. Is it more probable that the big companies create their own libraries? Those who most need ready-to-use footprints are actually small companies and even hobbyists who don’t care about IPC. The problem with pin 1 markings is bigger problem for them. Adding small protrusions which I show above would make markings clearer for everyone, and big companies who copy the official footprints and inspect them before using could very easily remove one extraneous silk line.

1 Like

That is the key issue, how can we moan at a cheap assembler not being aware of a dumped and now secret standard?

1 Like

Regardless of the silkscreen, you can certainly moan at a cheap assembler for not following the assembly documents, i.e. the fab layer & POS file, which clearly indicate part orientation. Assemblers shouldn’t be assembling based on silk.

(That’s not to say silkscreen in the libraries can’t or shouldn’t be improved)

1 Like

This topic was automatically closed 90 days after the last reply. New replies are no longer allowed.