Hello folks,
Just received a promotional email from Snap EDA.
Tip: A pin 1 indicator is a small element added to the land pattern. It allows engineers to easily locate the 1st pin to ensure proper orientation before mounting.
At SnapEDA, we ensure all relevant land patterns contain an indicator! #QualityMatters #PCBDesign #Electronics pic.twitter.com/ElA9jp6yYp— SnapEDA (@SnapEDA) June 1, 2022
Anyone already had production issues with the kicad style pin 1 indications?
I, for one, don’t like them.
Too subtle.
Previous discussion: DFN Placement Disaster - #24 by Evan_Shultz
Personally I also don’t like the “IPC style”, but also I haven’t had any issues with it causing confusion. I (and my manufacturers) would never use a visual inspection of a board silkscreen as the source of truth for part orientation, we would use the CAM data, which should be clear no matter what style you use.
I got the same email. I didn’t really take it as criticizing the KiCad library. Both styles have an indicator. It’s just a different style. I think what they meant is a no indicator at all.
Normally they’re okay. What always trips me up, though, is the pin 1 indicators on the DFN footprints. They almost look like they’re backwards from the normal indicator scheme, and I always end up double-checking when I’m doing board assembly.
Personally it’s never really crossed my mind. I have on occasion felt a need to clarify Pin 1 but I just put a dot there myself. 
The cam data that gets provided to the assembly house is just the pnp placement file (unless I am missing something) – which, unless you manually or automatically have a means to adjust for ipc-pin-1-upper-left-in-footprint-library vs how they come off the tape means the assembly guys need to manually fix things (or have you check on-screen and approve, as jlc does). For tqfp and other parts that come in trays, the pnp rotation may or may not mean something. I have no idea what zero is on a tray feeder.
The dots on the silkscreen are the last line of defense so they should be giant.
My assemblers also get the board data, including silkscreen gerbers, and PDF assembly drawings.
The assembly people do need to manually map orientations etc to their machines, but they do so by looking at drawings and data, not by looking at physical PCB silkscreen markings.
I think a lot of the complaints about the IPC style silkscreen markings is that they don’t translate as well to physical printing, especially on poor-quality silkscreen machines. But the source data doesn’t have that problem. So, I can definitely see it being a disadvantage for people assembling boards manually by looking at the board to see how to orient a component, but it doesn’t seem to be a big deal for automated production assembly.
Hey thanks for all the inputs. I didn’t knew IPC changed their pin 1 notation.
I guess dots could have other issues. I remember one board where one of the dot was between two IC and you couldn’t be sure which IC was concerned without looking at the docs. (I’ve worked on an assy line but on the inspection, not the placement). We also had boards with no silkscreen tho, and it was fine.
Alright, so, I’m going to use the IPC notation for now and see how it works.
All these services give a workpiece for editing and everything needs to be checked and compared with the documentation… Reduce drawing time
This doesn’t match my experience at all. Manufacturers I work with use everything they can see. If they notice an ambiguous silkscreen marking, they’re sending me an email, because it’s a sign they or I have missed something.
The only authoritative “source of truth” is the engineer who answers the email, when the data doesn’t agree. Generally for something egregious they’ll request a new fileset.
Do you make assembly drawings that show orientation? I have never had questions about silkscreen on an assembly that has an assembly drawing.
Also I really do not like the “ok it’s not great for printing but it doesn’t matter because this other data is authoritative” argument. It’s still there! Either make it good or don’t make it.
I’m more criticizing IPC than KiCad here, but those markings are terrible. I’ve never heard anyone say they like them. I’ve only heard complaints, or handwaving about how it doesn’t matter anyway
Yes.
If they see any sign something doesn’t match up, they’re asking. Adding more data doesn’t get rid of ambiguity in preexisting data. They particularly do not like the polarity markings on two-pin devices (capacitors! especially tantalum have been problematic).
While I’m beating this dead horse - bench technicians are a major part of my target audience for board markings, I don’t understand why we’re discounting them here. Do you never have to troubleshoot prototypes? You should be designing for the humans in your system first and the machines second.
I think you are reading too much into what I have said.
I was just answering the question:
by saying no, I have not had production issues, because I don’t use silkscreen as the source of truth. I am not saying I think the style is good. Anyone who is doing hand assembly or lots of rework may want to consider altering the symbols to add more silkscreen, if the layout is not too dense.
Sure. I and anyone else who troubleshoots prototypes does so with the CAD and/or drawings open on a computer. Silkscreen markings are only used to “orient yourself” to the general area of where you should be looking at the computer, in my experience.
I don’t really understand this statement – if a drawing has unambiguous orientation of a part, and silkscreen has no orientation data or “hard to read” orientation data, there is no conflict or ambiguity. Ambiguity would only seem to exist if the drawing has orientation described in a way that conflicts with the silkscreen.
I agree with folks who say the silk should have very obvious pin-1 markings (the fab layer as well), and I like big fat dots, snuggled in a spot that won’t interfere with bypass caps. It’s one more reason you should build your own library and tweak it to suit you.
But I also think @craftyjon’s point about including all the docs when going to fab makes a lot of sense. Before kicad, I only included a pdf of the silk along with gerbers, but now I include the fab layer which is definitive, if ever the silk is in question. But I still like the fat dots.
Yeah, tantalum caps never made sense with the marking line on the wrong side. But I designed-out tanatalums years ago after finding that it was a controversial conflict material. While some caps may use responsibly-sourced minerals, others may use a materials chain that is “mined in conditions of armed conflict and human rights abuses.”
https://www.responsiblemineralsinitiative.org/minerals-due-diligence/tantalum/
This topic was automatically closed 90 days after the last reply. New replies are no longer allowed.