Yes a corner silkscreen mark inside the footprint courtyard would be even better than a dot, the 2 lines short and long is the worst of the 3 suggested ways so far though.
The short and long line don’t seem to have anything to do with the IPC spec though I haven’t seen anyone mentioning it even using that. So I am not sure why people keep saying that is why it was done that way when it seems that isn’t the case at all.
Small local PCB houses don’t have machine vision systems often enough. I’m sure they will as time goes on but, adoption is going to be slower. And there is value for manufacturers like where I work in using local houses over large out of state/region companies. I’m literally a 15min drive from the PCB house I use.
Then why isn’t it doing that… everywhere I see that IPC spec being used it certainly isn’t using a long/short line. Shrugs I dunno… I just brought this up as it seems like low hanging fruit honestly. the corner mark or dot are both fairly obvious as superior to the lines, as far as being visually unambiguous and avoiding human error. The line I can only see as useful for hand soldering perhaps…
And I do make my own footprints for a few things, like an oddball DFN OSC I use… that has a bold corner to its outline in my footprint.
I don’t know what kind of marking you are speaking about.
How does silkscreen help in this case? This is a picture that can be with errors, unlike an assembly drawing… Now is not the 19th century to collect on papers or layouts… for everyone else there is a pick and place document
Did you read the post in the other thread DFN Placement Disaster - #24 by Evan_Shultz (direct link to the post)? The situation is a little bit more complicated than that some public standard would tell everything.
I don’t defend that decision at all, but there just isn’t any better solution which would make everyone happy.
The users can try to vote for an issue and see if it makes any difference. I already gave a proposition in that forum thread which in my opinion would be a good compromise.
A counter question is how to implement silk-screen printing with a high mounting density and, say, 0201 0402 components? In theory, it can be placed, but its size will be visible only under a microscope, and then only a part … For this reason, there is no standard for it … It is all done individually … In normal cad, the silkscreen is not tied to the component …
We are talking about practical considerations of real world challenges one way or another regardless of if you think so or not. Nothing I do goes smaller the 604… so meh. For those things it certainly is more of a problem and there are fewer things to enable problems to be caught ahead of time for components of that size. Also even for parts of that size its visible under microscope AND visible in the gerber files.
That is what the silkscreen is… its a visual aid. Nothing more nothing less.
The centroid data should be correct, the component rotation in the CAD should be correct, the orientation in the packaging should be standarized etc etc… but that doesn’t mean a better silkscreen representation doesn’t help or that it won’t save your butt at some point.
your opinion, not universally accepted.
It’s hardly a mere opinion. It’s based in the fact that visually when you place two lines on each side of an object its more complex visually to have to compare lengths of lines than it is to just identify where a dot, circle or triangle is located in a quadrant. That’s scientific fact.
I’m no expert in typography or symbology or what not but I do at least know that much about the topic… it has nothing to do with a personal preference, its what works and what does not for me. Obviously indicators outside the court yard work best for socketed packages, indicators inside are probably best for machine assembled boards… again that is based on irrefutable facts not opinion.
My point here was not to turn this into some flame war, but to point out that this did result in a real world problem for me. And… after some discussion it appears the footprint in question is not following the standard?
in your opinion, the lack of silk-screen printing on the board will not allow you to assemble the device? in Geber, silk-screen printing is a separate layer and does not affect the assembly of the device … like any inscription … the smt and tht mounting technology itself does not provide for this … the board can be white and there may not be silk-screen printing … a lot different situations when screen printing does not help In the end, you can draw yourself putting down as convenient. This program already has enough problems more serious than drawing pictures …
Nobody said that please quit going off topic. If you want to make up arguments do it else where.
My PCB fab does in fact refer to the silkscreen for assembly orientation purposes to verify against the centroid data which isn’t always enough (since it has to be matched up between the packaging and the acutal intended orientation, if you run it blind off the data alone it will get it wrong frequently enough). End of story.
Not quite complete.
There was a planned IPC-7351C that was developed over like 6+ years and this included the line polarisation markers.
Kicad made the decision a few years ago to align to this as it looked like it was going to be finalised. This got scrapped about two years leaving us with three conventions
nah, it is just your main argument, which ignores cases like:
that is more or less the definition of personal preference, especially if others don’t have problems working with it or even like it more…
true but which standard sets the dot as pin 1 identifier? fact is, there is no standard for this (sadly) so there is also not really an argument based on this. of course we can discuss on which solution maybe best for kicad, but please stop trying to justify it with something else then your personal opinion, as there is simply no ground for that.
That makes sense as to why it occured.
That said the current situation is that Kicad is following a non standard that nobody wanted. Also… “new standards” tend to stall in workgroups because of several reasons, often enough the current iteration is already correct, I fail to see the reason to follow a standard trying to reinvent itself that fell flat on its face because well because of bad aspects like this double line mess.
The worst part is Kicad’s symbols DID have the circles and dots before! And its now confusing people at fabs… because this ISN’T a standard.
Kind of OT,
For a company I work, we do not use any silkscreen at all for individual footprints: no reference/value or any other line. We use a global artwork for the whole pcb. References, values and lines, polarity, etc are placed on F.Fab/B.Fab.
On a second company it is the other way round: silkscreen for references and lines always on F.SilkS and for THT integrated circuits also on B.SilkS so they can find pin1 when flipping the real pcb during testing or desoldering.
That’s fine I’m not trying to obfuscate my design.
It would kind of make sense for anyone doing so to just rename the gerber file or copy all the data on that layer to the Fab layers.
Ugh! Unreleased is smoke. Never do Unreleased
if we talk about what to do like everyone else, it’s enough to look at altium and you don’t need to invent a bicycle … there will always be dissatisfied but the number of users decides here … first of all, software for people and not people for software
