A help with QFN footprint with thermal vias and solder paste

are you looking for a Paste mask over vias?
Is that any doc that has suggested that?
if you look at TI manufacturer QFN layout guidelines

you will see they suggest solid vias


and stencil without a keep-out Paste zone

NXP suggests eventually to tent vias, but this is controversy among manufacturers
www.nxp.com/assets/documents/data/en/application-notes/AN1902.pdf