Or, they will put the job on “HOLD” while they contact you and confirm that they don’t need it. Even this assumes they can figure out what the extra file represents.
I don’t think there are very many of us on the Forum who can even remember 1977!
Dale
Like it was yesterday … locking myself in a tiny bathroom, it was the only room with no windows, with a can of photoresist, the UV lamp from my EPROM eraser and a toaster oven, and of course my copper clad board. 
That board was a decade counter with an LED display for a school project. And it didn’t have any solder mask. 
That was one year before my first Z80 computer but for reasons I don’t recall that was a hand wired board, no PCB, and a year or two before I discovered wire wrapping. How time flies …
That is the difference between civilized and not civilized country, I think.
I had a ‘lucky’ to be in second one. In 1988 we (me and my brother) setup a firm and our first product was an EEPROM programmer. It had a board without solder mask. I have here one of first 4 devices producted in 1988 (after many years someone asked for repairing it but we send him a new one and hold this historical device for us).
I don’t remember exactly why it had a board without solder mask. May be we coudn’t order such one, or may be it was a question of price (those time working at technical university teaching students my salary was about $15 (not per hour but per month)).
So the PCB without solder mask I have less then 1m from me 
Me to. In 1977 I passed the exams and become a student of electronic. In 1976 I had in my hands my first silicon transistor. It was BF520, and really it was not mine. I have done the darkroom-clock (not sure if good name - to drive the photo enlarger) for my friend and with german transistors it had not repeatable time. He had to ask his mother to buy BF520 to let me try if it would be more stable - it was. BF520 costed here those times 60 while typical month salary was about 2000.
Thanx so much I really appreciate your help.
The reason I left the left side of U3 empty was because I am going to hand-solder so I need the space. I am aware of the need to have the bypass caps right up against the IC. What you say about ESR and ESL is something I admit I haven’t thought about. This is really important for me to see your comment. Thank you so much.
Look for informations about EMC PCB design. I remember series of articles of Keith Armstrong I read about 10 years ago.
Don’t worry. SMD elements are so low that you can put them as close as the sorrounding in library (CrtYd) allows. You will be able to solder them provided you have soldering iron with sharp tip.
I get our PCBs soldered, From time to time (once per 2 years) it happens I need to do some experiments with something wich is practically not calculable. As it is so rare I have no tools destined to do it. To desolder 0603 among other 0603 I get in left hand 110W trafo soldering iron and the destined to SMD soldering iron in right hand and just do that. If I had two SMD irons I wold probably try to use them. Switching off trafo iron at right moment I left with that 0603 at its tip. It happened that I soldered/desoldered one 0603 capacitor more that 20 times and the PCB is still working (looking not too good but working ).
Study page 12 of the ADuM6000 datasheet. This is a dc-dc convertor and can generate high noise if you don’t use it right
Putting a little emphasis to davidsrsb here.
I am amazed about the state of modern electonics and a SMPS circuit in a 16 pin soic pumping 500mW through a 180MHz connection is … amazing.
pcb layout from stamechad11 seems not up to that.
Not only is decoupling inadequate, he also missed the thermal dissipation pads.
(Even though they look small and can be easily looked over )
But why is this attached to the “pro tip: nicer via stitching” ?
This should have been split off some time ago.
Aah, now I see. stamechad11 was wondering why his via’s did not show up on the Gerbers.
There is nothing to show for the via’s on the gerbers. It is as simply as that.
The coordinates of the gerbers should be visible though in the drill file.
(Oops, drill file was already mentioned a few posts later).
But those via’s probably should not even be there anyway.
It is probably a lot smarter to connect the copper pours on the top side to the Vcc net and create a distributed capacitance between GND and VCC. Especially if I see 180MHz SMPS circuits…
Another tip:
After putting lots of decoupling capacitors as close as plausible to those converter chips, it might be a good idea to add a few centimeters of trace and yet another decoupling capacitor before you connect the power nets to the copper pours. The inductance of such a trace might help to keep some the noise that the ADuM6000 creates out of the GND plane.
Yet another tip:
Interruptions of the GND plane are pretty small & OK (Good to think of that), but at least half of those bridges can very easily be routed around the track to remove them completely.
You will be very dissapointed if you have a board being manufactured and when you open the package you discover that a copper layer has been accidentally swapped with your silk screen by some automated process. One of the keys to cheap PCB’s is as much automation as possible. Man hours are very expensive.
For about 20 years there is a “newer” version of the Gerber file format which puts all layers into a single file and I’ve read that is has been adopted by about 95% of industry.
There is a lot of history in the Gerber file format, and not all of it is good 
https://en.wikipedia.org/wiki/Gerber_format
It’s been a long time since I last generated Gerbers with KiCad.
Was surprised I could not find them under PCBnew -> File -> Fabrication Outputs.
Location is also not clear while searching for “gerber” in the PCBnew Reference manual: http://docs.kicad.org/stable/en/pcbnew.html ???
However quite easy to find from the Getting started manual. Strangely it is under: PCBnew -> File -> Plot.
I also have some vague memories this has moved in V5, so probably not worth wasting much time about.
[quote=“paulvdh, post:81, topic:1103, full:true”]
pcb layout from stamechad11 seems not up to that.
Not only is decoupling inadequate, he also missed the thermal dissipation pads.
(Even though they look small and can be easily looked over )
I am new to this and don’t really understand the meaning of those pads. Isn’t the top copper fill an adequate thermal dissipation instrument?
But those via’s probably should not even be there anyway.
It is probably a lot smarter to connect the copper pours on the top side to the Vcc net and create a distributed capacitance between GND and VCC. Especially if I see 180MHz SMPS circuits…
I thought about that bust since I have 3 sepparate regions of 5v 3.3v and floating 3.3v I thought it would be better to just make everything ground. Is that a strong enough reason to keep my design as is? What are the pros and cons?
Copper is a very good heat conductor, but FR4 is not.
The epoxy casing of most chips is also not very good at heat dissipation.
Often the legs of the chips have a much better heat conductivity to the die in the chip than the outside of the casing.
In the example of the AduM… PCB layout the (pretty small) rectangular extensions of the pads conduct some of the heat from the chip away. But this only works if those pins are connected to some wide copper area.
The copper fill does not take much heat away from a chip if it is not connected directly to the chip.
Anectote: The worst (beginner) mistake I saw about this whas a nice big copper path for heat dissipation connected to the thermal pad of a voltage regulator (LM1117), but that pad had thermal reliefs for easier soldering and very thin connections to the big copper area. Doh!
And put in those extra decoupling caps.
Hard switching @180MHz is nothing to think lightly about.
There is a very good reason they suggest to put 8 decoupling caps on a single IC.
The routing of C6 and C9 are particularly bad. The decoupling capacitors really should be placed close to the chips they should decouple and connected with the shortest wires possible.
Not placed a cm away from the chip and then make a connection to the GND plane which is even further away from the chip. Priority here is to connect the cap to the chip. NOT connect the cap to Vcc / GND, those connections are less critical. Addition: All other decoupling caps are also placed far away from the chips they should decouple.
No, it’s not. but I do not feel like repeating myself as a parrot.
So instead I point you to the last post of Rerouter in this thread:
https://forum.kicad.info/t/copper-fill-inner-layers-yes-or-no/10710/24
Another, more psychological question:
Why do you doubt the advise of others?
Why not question your own assumptions?
I’m a bit curious: Why do you think that simply fillin all unused area with GND plane would be “better”? what is the rationale behind that idea?
Paul thank you so much for your long and full answers and for all of your patience. You are really a big huge help here
Is the pad where the pin is soldered to FR4 while the copper fill is copper?
When the recommended PCB layout of the ADuM6000 shows to put a pad, do they mean that is should be copper and NOT FR4? Is this pad covered by solder mask or is it exposed? If it is covered with soldermask will it still dissipate heat properly? Did I understand you correctly?
LOL! 
Will do! Thanx! The only skepticism I had was that I am only going to utilize about 25mA out of 100mA available on side 2 of the ADum6000, which means it wont heat up too much? That’s what people told me. I really don’t know much myself about this issue.
Would the best placement for C6 and 9 be to the left of the IC? Is 1mm away from the pad of the pin close enough? Should the ceramic or the tantalum capacitor be closer?
Do you mean that they are 1cm away from the top 5V pin (pin 1) or the bottom 5V pin (pin 8)?
I have my instructor telling me one thing, my friend who is an engineer for many years telling me something else and then a couple of different opinions here on the forums so I’m kind of confused. Don’t mean to question anybody I am simply asking my way to victory. Bear with me lol.
I think you don’t understand what FR4 is, we all had to learn at some point. From Wikipedia:
FR-4 (or FR4) is a NEMA grade designation for glass-reinforced epoxy laminate material. FR-4 is a composite material composed of woven fiberglass cloth with an epoxy resin binder that is flame resistant (self-extinguishing).
It is a non-conductive material that the conductive copper is stuck to to physically support the circuit. Solder mask is a separate coating that is added to the PCB after the circuit is built (usually etched) on the FR4 that both protects the copper from oxidation and keeps solder from sticking to parts of the copper that the designer (you in this case) doesn’t want solder.
So the pad is copper (usually with a metallic surface finish to reduce oxidation and to promote solderability) that isn’t covered by solder mask. A “copper pour” is just a large area of copper (“poured” in software by an area fill instead of hand-drawn with line segments) that may or may not be covered with solder mask.
Copper that is covered with soldermask will still spread heat around to connected copper. While solder mask isn’t as good of a heat conductor as copper, at the thickness of the mask it isn’t nearly as strong an insulator that the FR4 is.
Yep, FR4 is just the base material of (most) PCB’s.
Most plastics are very bad heat conductors. Most metals are very good at this.
Some ceramics are excellent heat conductors (and partly why some PCB’s are made out of ceramic substrate).
PCB’s for led’s are sometimes made from aluminimum for heat conduction with a thin insulating paint layer between the aluminimum and the copper traces.
Aluminimum oxide is also an insulator, and they may even depend on that if they controll all process parameters carefully.
Note: I once had a circuit with a bunch of TO220’s mounted on a heatsink and I wanted to use the aluminimum heatsink to conduct current to those TO220’s. It did not work.
Solder mask over the copper will infuence heat radiaton a bit in a negative way, but is probably a lot better than a shiny tinned surface of bare pads. Color does matter here, and mirror like surfaces are the worst. Matte black the best for heat radiation.
In the following picture (from page 12 of the ADuM6000 datasheets) davidsrsb brought into the discussion:
1a: Do those heat dissipation pads have a specific size or does Analog Devices expect us to approximate the size ourselves just by using our bare eyes? (there is no mention of size in the datasheets)
1b: Are those pads exposed copper or are they covered in solder mask?
2: Are those capacitors really that small or can I use 1206 ones as well?
3: Should the tantalum or the ceramic capacitors be closer to the ADuM6000?
4: What do they mean by “consider bypassing between… unless both common… package”?
There are formulas for calculating temperature rize if heat input is known, but eyeballing it is all right here. It is not very critical, but take the size of those pad’s as a minimum.
In industry it is exceptional to use anything bigger than 0603 nowaday’s.
Smaller capacitors have lower self inductance, and that is an important factor if you want to run them at 180MHz.
Ceramic MUST be the closest, because they are for “shorting” the highest frequency content of the noise.
Tantalum (bulk?) capacitors are less critical (for frequency content upto a (few?) MHz and can be further away.
Pins 2, 3 & 8 are all connected to GND1, internally in the chip.
If the GND pad’s from pins 2,3 has a long wire (external connection) to the pad fo pin 8, then they recommend to add extra bypass capacitors on the bottom of the PCB.
Easiest way is to connect pins 2, 3 & 8 directly together with a trace just under the IC package.
Is the capacitor size absolutely critical if I already ordered 1206 parts?
If I have a ground copper fill is that a close enough connection between pads to not have to bypass between them?
Are the heat sinks exposed or covered in solder mask?
I think you would be hard pressed to realize a difference between 1206 and 0603. Yes there is a measurable different at very high frequencies but you won’t see it in this design.
In general you can think of the capacitor as a shock absorber and copper traces as springs. You can see if the shock absorber’s goal is to stop the voltage from bouncing around, that adding a spring in series (in this case copper traces) will be detrimental.
I understand you are new to this concept so it is difficult for you to fully grasp the subtilties of clad length (I’m sure you will learn). I think if you follow AD’s recommendations you can’t go wrong.
Should you use solder mask? Without a doubt. In addition to masking areas during the soldering operation the mask keeps the copper traces covered and so it keeps them clean. It would not be good to have bare copper on each side of your isolation area where they can be bridged by partially conductive contamination. Someone might point out that solder mask does not replace a conformal coating. This is true but it most certainly helps.
Last caveat. Is your design expecting substantial voltages between isolated areas (like 120VAC)? If so you might look at UL or other standards for minimum spacing.
What material are those parts?
Also, I’ve been using 1206 parts in my designs because I can hand solder them without to much difficulty. However, I have also found, that there is a difference in the quality of manufacture regarding the end cap material.
It would not surprise me at all if the different manufactures claims on the DataSheet actually vary from different manufactures. Testing the ESR, ESC, and ESL, over frequency requires a rather expensive piece of test equipment (that happens to also be overly complicated to set up for each test).
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