I used this video to connect my top and bottom ground planes to each other. My question is, will it actually connect my top and bottom planes or is it between inner layers but won’t be from top to bottom coppers. I followed all the instructions you gave and in the gerber view i can’t see them which is freaking me out.
And this is my PCBNew screenshot. Does it make sense that this is my PCBNew and that the gerber looks like the above? Please I am so nervous. This is my final project and I need to be precise or I won’t pass lol… Does anyone know if I’m ok or not? The red circles are some of the vias that don’t appear in the above gerber view.
Thanx so much
I think that as these vias do not have thermal relief, that they won’t show on a layer plot, even though they are there on the finished board.
What I did notice is that you need vias to the inner layer much closer to the ADuM6000 ADuM2550 and where the decoupling capacitors make GND connections.
Stop and think where the current flow is. You are trying to create minimum loops from power to ground through the decoupling.
1: What makes them not have thermal relief? The fact that they are not actually a hole but just a filled up hole?
2: I added more vias and moved some others around. Is this what you meant (the yellow dots are vias)?
Thermal relief is used where soldering is involved. Vias don’t get thermal relief. You don’t see them on your gerbers because there are no features in the copper to see. Load the excellon drill file into gerbview and you should see your stitching vias.
Yes. And you have to load them all into the gerber viewer AND CHECK every square centimeter on your board to make sure EVERYTHING is correct.
And if you serve the fab a particular layer, serve them BOTH front and back for it.
They don’t have to guess if you missed the other and call you back or hold your job.
If the file is empty for the other layer, they will know that’s what you want and not ask.
absolute minimum you need:
…plus any copper layers between them, if you got internal ones.
The following are ‘optional’…
If you board has a certain outline (most cheap fabs will otherwise just draw a rectangle as big as your layout and call it a day):
[boardname]-Edge_Cuts.gbr or .gm1
If you want soldermask that covers everything sans the pads:
If your board has got silkscreen printing on it:
Now we are getting into advanced topics, that need more understanding on your part on how this all works:
If you want to order a stencil for SMD solder paste reflow:
If you want to have it populated (not visible in gerber!!, those are text files and their format highly depend on the fab you use):
…if your board is being produced with SMD components on both sides you will need the adhesive layers.
And we could keep on going - more than 2 layers, you might want to provide a stack file, to tell the fab the heights of the prepreg between the copper layers.
Then there are other substrates, like aluminium core or polyamide for flexible pcbs (or a mix of them) or buried vias or microvias. Etc. pp.
The gerbviewer that ships with KiCAD doesn’t stick with a certain color <> layer list. It just loads the layers and assigns colors as they come in his list.
You have to create and load the same layers every time (even if you don’t use them) to make the gerbviewer colors consistent.
That’s why I always plot the copper, mask, silk, drill, edge and stencil file, even when a board doesn’t need them - makes my gerber viewing consistent - and send them all to the fab.
And check the layers for top and bottom separately (below screenshot shows my layer selection for the bottom layer check)
Oh, and use the legacy mode - the layers will be see through (menu I show in the screenshot).
The OpenGL canvas can’t do that yet - harder to spot problems.
Wow. Thank for this excellent answer. Do most people get solder masks? Cause in Chris’s tutorials I think he doesn’t order them (him and a couple other guys on YouTube is how I familiarized myself with KiCad).
I don’t know exactly what David meant but write some words from me (not about KiCad - I don’t know well yet).
You must understand the role of blocking capacitors. The simplest rule can be: the way from IC VCC pin to its GND pin through its blocking capacitor should be as short as possible. It is specially important for ICs with fast switching signals (like microcontrollers) and with high switching curents like DCDC.
Lets look at one such capacitor - C6. Looking at colors I suppose C7 is tantal and its connection is less important as its ESR and ESL are higher then C6 (ceramic I think).
Look at the way from U3 pin 1 through C6 to U3 pin 8. It is 3…4 times longer than it could be if C6 would be placed to the left of U3. C6 can connect pins 1 and 8 without having the connection to go to oposite PCB side. Assuming typical 2 layer PCB of 1,5mm thickness going to oposite side and back is 3mm - it is long way.
It is much more important (with modern fast circuits) than you probably suppose now.
If you want to have holes in your PCB, yes Note that you may have two drill files, one for plated-through holes and one for non-plated-through holes. Send them both. In fact, when in doubt, send everything - the fab will ignore stuff they don’t need.
Yes. I haven’t seen a board without solder mask since like 1977. It prevents solder bridges between adjacent copper areas.
Every board fabricator I’m familiar with has a paragraph on their web site explaining “Submission Requirements” (or something similar). That’s where they tell you what layers are required, as well as special naming requirements for the Gerber files.
I wasn’t aware of the “draw a rectangle as big as your layout” protocol, but I have always searched for (and followed) a manufacturer’s specific instructions for the board outline. Putting the outline contour - and ONLY the outline contour - in a separate file seems to be the most common practice now, but in previous times you sometimes plotted the outline on EVERY layer.
In the “good old days” (formerly known as “these difficult times”) there were several common practices used to avoid confusion, guesswork, and errors when submitting board files to a fabricator. With web-based ordering and the demise of human CAM operators these may be less effective or even redundant but some fabricators still pay attention. For example, every one of my layers includes the layer name (“FRONT COPPER”, “BACK MASK”, etc) placed just outside the actual board area. When I submit a board layout as a complete package in a *.ZIP file I always include a “Readme.txt” which identifies each of the layers by file name. (This file also includes things such as board construction notes, geometry design constraints like minimum trace width and spacing, my contact information, shipping address, etc.).
Solder mask is assumed for almost all boards, and omitting it seldom results in cost savings except for fabricators who specifically offer “naked” boards. The exception would be a board that must be produced at the absolutely lowest cost and fastest turnaround, and will definitely be discarded after development is finished. Solder mask not only makes assembly easier but also helps protect copper on the outside layers from corrosion or physical damage.
Like it was yesterday … locking myself in a tiny bathroom, it was the only room with no windows, with a can of photoresist, the UV lamp from my EPROM eraser and a toaster oven, and of course my copper clad board. That board was a decade counter with an LED display for a school project. And it didn’t have any solder mask. That was one year before my first Z80 computer but for reasons I don’t recall that was a hand wired board, no PCB, and a year or two before I discovered wire wrapping. How time flies …
That is the difference between civilized and not civilized country, I think.
I had a ‘lucky’ to be in second one. In 1988 we (me and my brother) setup a firm and our first product was an EEPROM programmer. It had a board without solder mask. I have here one of first 4 devices producted in 1988 (after many years someone asked for repairing it but we send him a new one and hold this historical device for us).
I don’t remember exactly why it had a board without solder mask. May be we coudn’t order such one, or may be it was a question of price (those time working at technical university teaching students my salary was about $15 (not per hour but per month)).
So the PCB without solder mask I have less then 1m from me
Me to. In 1977 I passed the exams and become a student of electronic. In 1976 I had in my hands my first silicon transistor. It was BF520, and really it was not mine. I have done the darkroom-clock (not sure if good name - to drive the photo enlarger) for my friend and with german transistors it had not repeatable time. He had to ask his mother to buy BF520 to let me try if it would be more stable - it was. BF520 costed here those times 60 while typical month salary was about 2000.
The reason I left the left side of U3 empty was because I am going to hand-solder so I need the space. I am aware of the need to have the bypass caps right up against the IC. What you say about ESR and ESL is something I admit I haven’t thought about. This is really important for me to see your comment. Thank you so much.
Look for informations about EMC PCB design. I remember series of articles of Keith Armstrong I read about 10 years ago.
Don’t worry. SMD elements are so low that you can put them as close as the sorrounding in library (CrtYd) allows. You will be able to solder them provided you have soldering iron with sharp tip.
I get our PCBs soldered, From time to time (once per 2 years) it happens I need to do some experiments with something wich is practically not calculable. As it is so rare I have no tools destined to do it. To desolder 0603 among other 0603 I get in left hand 110W trafo soldering iron and the destined to SMD soldering iron in right hand and just do that. If I had two SMD irons I wold probably try to use them. Switching off trafo iron at right moment I left with that 0603 at its tip. It happened that I soldered/desoldered one 0603 capacitor more that 20 times and the PCB is still working (looking not too good but working ).