I generally try to avoid vias smaller than 30/15 mils (.76/.38mm).
Any drill size smaller than 10 mils (.254mm) risks plating issues, and annular ring radius of less than 5mil (.127mm) risks breakout. Since I want to make boards that are as easy and inexpensive to manufacture as possible, I will start with a large via, and only switch to smaller vias as the routing gets tight.
In addition to the fab house capability, I think that a lot depends upon the boards that you are designing. If you are designing cell phones or motherboards around high end CPUs or FPGAs, then I think you need to push the envelope for high density. A lot of hobby boards, not so much.
One other risk about pushing the envelope: The envelope can get wrinkled or leave ink on the desk. Better to pick up the envelope, put on a postage stamp, and mail it.
For me both KiCad V6.0.6 and V6.99 default to 0.8mm via’s with 0.4mm hole.
The annular ring for 0.6 / 0.4mm is too narrow for the (Edit: most cost effective 2-layer) “generic PCB process”. Aisler has a 0.2mm limit. Both JLC and PCB Way have a 0.15mm limit, and JLC even writes that they will enlarge via’s to get to this annular ring size, which may get you into trouble with the clearance, unless they check that too. Oshpark has an 0.127mm limit for annular rings. Eurocircuits has a minimum 0.35mm drill tool size and minimum 0.6mm via.
So that 0.6mm via with 0.4mm hole does not comply with any of these 5 manufacturers. Where did you get those numbers from? In my opinion KiCad’s defaults should be coarse enough so they can be used by inexperienced KiCad users and work for (almost) any PCB manufacturer, while more experienced users will setup their design rules themselves, so defaults don’t matter much.
The 0.6/0.4 must have been imported from somewhere, but looked wrong to me.
Looking at the comments so far, a 0.7/0.35mm is a viable option
I often route 100 pin 0.4mm pitch pqfp and the default 0.8/0.4 gets blocking
I can add my local information. Here in my city there is the PCB manufacturer we used ‘since always’ (I remember walking to them with two photographic films of both pcb layers as they didn’t had a photo-plotter yet). Now they are one of the biggest PCB manufacturers in Poland.
Annual rings for top and bottom and internal layers of 4 layer boards - typical: 5mils (0.127), minimum 4mils (0.102).
Annual ring at internal layer of 6 layer board - typical: 6mils (0.152), minimum 5mils (0.127).
Annual ring at internal layer of 8 layer board - typical: 7mils (0.178), minimum 5 mils (0.127).
Since the times (the 80’s) when it happened for our PCB manufacturer to make via that had no contact and to drill holes with some offset I am used to use bigger vias. 0.9/0.4 is my standard. For via stitching I mainly use 1.2/0.7. For thermal pads I used 0.7/0.3 but an year ago decided to use 0.6/0.25 even our contract manufacturer dissuaded.
With jlpcb I have not had problermi on via 0.6 / 0.3mm even if I use them where the spaces are tight.
Otherwise I use 0.7 / 0.4mm and example for connections to the GND plane I use 0.9 / 0.5mm.
Then in particular cases I use via large for power track.
0.6 / 0.3mm is my default, unless the board is quite thick and then the aspect ratio comes into play… larger and then I just went 0.8/0.3mm (with teardrops) for a 3mm+ thick PCB
I have used 0.6/0.3 since pre-v5 when it was the minimum for the 2 cheap chinese ones, without problems. Now they seem to be capable of smaller. I would have used smaller because almost all of our designs were space restricted and vias take relatively much space.
Sure, 4 and 6 layer PCB’s usually have tighter tolerances, but if you look at davidrsb’s original post:
And a 0.6mm pad with 0.4mm hole has an annular ring of only 0.1mm, so that does not fit with the original post, and I don’t understand why @davidsrsb gave you a “like” for that post.
I think I got a ‘like’ (I like to get likes ) for giving a complete set of information from one manufacturer that probably no one else would check. Such a supplement to the information.
See the post right in front of mine. My information confirmed:
When I imagine the 0.3mm hole in 1.6mm PCB it is hard to believe me how they manage to metallize it inside
How to be sure that in one out of every 100 holes a small air bubble is not left inside. I know it’s not my problem, but it just goes against my imagination.
This has been my experience. At those stackup specs, 0.5/0.25mm has also never caused me trouble even with the cheap fabs in recent years. I would generally use the smaller drill inside thermal pads and in dense layouts.