Check that your graphics mode is set to Accelerated instead of Fallback in the preferences menu
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Ok, great - I have a backup of the whole folder. I will try this and report back. Thank you.
Ok, will do - thank you.
What are the file sizes?
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Of the bak files? One of my projects the kicad_pcb-bak files are around 27-28kb
This may cause some sidetracked discussion. A blank window is different than a gone file. Just open the .kicad_pcb file with a text editor to see if it’s gone or if it has garbage inside. KiCad files are plain text, it’s easy to see if it’s even remotely KiCad data if you compare with one file which is known to be good.
Another thing is the graphics mode mentioned by craftyjon. It affects the view, rendering, possibly causing a blank window on Mac. It has nothing to do with the file.
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Opened the .kicad_pcb file with a text editor and here’s an example below. Both Graphics (accelerated) and Graphics (fallback) options are currently set to no antialiasing. I changed to subpixel antialiasing and fast antialiasing respectively and no change there with the blank background:
(kicad_pcb (version 20171130) (host pcbnew "(5.1.6-0-10_14)")
(general
(thickness 1.6)
(drawings 4)
(tracks 5)
(zones 0)
(modules 3)
(nets 4)
)
(page A4)
(layers
(0 F.Cu signal)
(31 B.Cu signal)
(32 B.Adhes user)
(33 F.Adhes user)
(34 B.Paste user)
(35 F.Paste user)
(36 B.SilkS user)
(37 F.SilkS user)
(38 B.Mask user)
(39 F.Mask user)
(40 Dwgs.User user)
(41 Cmts.User user)
(42 Eco1.User user)
(43 Eco2.User user)
(44 Edge.Cuts user)
(45 Margin user)
(46 B.CrtYd user)
(47 F.CrtYd user)
(48 B.Fab user)
(49 F.Fab user)
)
(setup
(last_trace_width 0.25)
(trace_clearance 0.2)
(zone_clearance 0.508)
(zone_45_only no)
(trace_min 0.2)
(via_size 0.8)
(via_drill 0.4)
(via_min_size 0.4)
(via_min_drill 0.3)
(uvia_size 0.3)
(uvia_drill 0.1)
(uvias_allowed no)
(uvia_min_size 0.2)
(uvia_min_drill 0.1)
(edge_width 0.05)
(segment_width 0.2)
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.12)
(mod_text_size 1 1)
(mod_text_width 0.15)
(pad_size 1.524 1.524)
(pad_drill 0.762)
(pad_to_mask_clearance 0.05)
(aux_axis_origin 0 0)
(visible_elements FFFFFF7F)
(pcbplotparams
(layerselection 0x010fc_ffffffff)
(usegerberextensions false)
(usegerberattributes true)
(usegerberadvancedattributes true)
(creategerberjobfile true)
(excludeedgelayer true)
(linewidth 0.100000)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15.000000)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 1)
(scaleselection 1)
(outputdirectory ""))
)
(net 0 "")
(net 1 "Net-(1K1-Pad2)")
(net 2 "Net-(1K1-Pad1)")
(net 3 "Net-(BT1-Pad2)")
(net_class Default "This is the default net class."
(clearance 0.2)
(trace_width 0.25)
(via_dia 0.8)
(via_drill 0.4)
(uvia_dia 0.3)
(uvia_drill 0.1)
(add_net "Net-(1K1-Pad1)")
(add_net "Net-(1K1-Pad2)")
(add_net "Net-(BT1-Pad2)")
)
(module LED_THT:LED_D5.0mm (layer F.Cu) (tedit 5995936A) (tstamp 5F58DB4E)
(at 122.555 109.855)
(descr "LED, diameter 5.0mm, 2 pins, http://cdn-reichelt.de/documents/datenblatt/A500/LL-504BC2E-009.pdf")
(tags "LED diameter 5.0mm 2 pins")
(path /5F58D5A3)
(fp_text reference D1 (at 1.27 -3.96) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value LED (at 1.27 3.96) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 1.25 0) (layer F.Fab)
(effects (font (size 0.8 0.8) (thickness 0.2)))
)
(fp_arc (start 1.27 0) (end -1.29 1.54483) (angle -148.9) (layer F.SilkS) (width 0.12))
(fp_arc (start 1.27 0) (end -1.29 -1.54483) (angle 148.9) (layer F.SilkS) (width 0.12))
(fp_arc (start 1.27 0) (end -1.23 -1.469694) (angle 299.1) (layer F.Fab) (width 0.1))
(fp_circle (center 1.27 0) (end 3.77 0) (layer F.Fab) (width 0.1))
(fp_circle (center 1.27 0) (end 3.77 0) (layer F.SilkS) (width 0.12))
(fp_line (start -1.23 -1.469694) (end -1.23 1.469694) (layer F.Fab) (width 0.1))
(fp_line (start -1.29 -1.545) (end -1.29 1.545) (layer F.SilkS) (width 0.12))
(fp_line (start -1.95 -3.25) (end -1.95 3.25) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.95 3.25) (end 4.5 3.25) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.5 3.25) (end 4.5 -3.25) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.5 -3.25) (end -1.95 -3.25) (layer F.CrtYd) (width 0.05))
(pad 2 thru_hole circle (at 2.54 0) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
(net 1 "Net-(1K1-Pad2)"))
(pad 1 thru_hole rect (at 0 0) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
(net 3 "Net-(BT1-Pad2)"))
(model ${KISYS3DMOD}/LED_THT.3dshapes/LED_D5.0mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Connector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_Vertical (layer F.Cu) (tedit 59FED5CC) (tstamp 5F58DB3C)
(at 122.555 101.6)
(descr "Through hole straight pin header, 1x02, 2.54mm pitch, single row")
(tags "Through hole pin header THT 1x02 2.54mm single row")
(path /5F512D59)
(fp_text reference BT1 (at 0 -2.33) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 9V (at -3.175 1.905) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 1.27 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start 1.27 -1.27) (end 1.27 3.81) (layer F.Fab) (width 0.1))
(fp_line (start 1.27 3.81) (end -1.27 3.81) (layer F.Fab) (width 0.1))
(fp_line (start -1.27 3.81) (end -1.27 -0.635) (layer F.Fab) (width 0.1))
(fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start -1.33 3.87) (end 1.33 3.87) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 1.27) (end -1.33 3.87) (layer F.SilkS) (width 0.12))
(fp_line (start 1.33 1.27) (end 1.33 3.87) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start -1.8 -1.8) (end -1.8 4.35) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.8 4.35) (end 1.8 4.35) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.8 4.35) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
(pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 3 "Net-(BT1-Pad2)"))
(pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 2 "Net-(1K1-Pad1)"))
(model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x02_P2.54mm_Vertical.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal (layer F.Cu) (tedit 5AE5139B) (tstamp 5F58DCB7)
(at 129.54 101.6 270)
(descr "Resistor, Axial_DIN0204 series, Axial, Horizontal, pin pitch=7.62mm, 0.167W, length*diameter=3.6*1.6mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf")
(tags "Resistor Axial_DIN0204 series Axial Horizontal pin pitch 7.62mm 0.167W length 3.6mm diameter 1.6mm")
(path /5F510ED4)
(fp_text reference 1K1 (at 3.81 -1.92 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value R_US (at 3.81 1.92 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 3.81 0 90) (layer F.Fab)
(effects (font (size 0.72 0.72) (thickness 0.108)))
)
(fp_line (start 2.01 -0.8) (end 2.01 0.8) (layer F.Fab) (width 0.1))
(fp_line (start 2.01 0.8) (end 5.61 0.8) (layer F.Fab) (width 0.1))
(fp_line (start 5.61 0.8) (end 5.61 -0.8) (layer F.Fab) (width 0.1))
(fp_line (start 5.61 -0.8) (end 2.01 -0.8) (layer F.Fab) (width 0.1))
(fp_line (start 0 0) (end 2.01 0) (layer F.Fab) (width 0.1))
(fp_line (start 7.62 0) (end 5.61 0) (layer F.Fab) (width 0.1))
(fp_line (start 1.89 -0.92) (end 1.89 0.92) (layer F.SilkS) (width 0.12))
(fp_line (start 1.89 0.92) (end 5.73 0.92) (layer F.SilkS) (width 0.12))
(fp_line (start 5.73 0.92) (end 5.73 -0.92) (layer F.SilkS) (width 0.12))
(fp_line (start 5.73 -0.92) (end 1.89 -0.92) (layer F.SilkS) (width 0.12))
(fp_line (start 0.94 0) (end 1.89 0) (layer F.SilkS) (width 0.12))
(fp_line (start 6.68 0) (end 5.73 0) (layer F.SilkS) (width 0.12))
(fp_line (start -0.95 -1.05) (end -0.95 1.05) (layer F.CrtYd) (width 0.05))
(fp_line (start -0.95 1.05) (end 8.57 1.05) (layer F.CrtYd) (width 0.05))
(fp_line (start 8.57 1.05) (end 8.57 -1.05) (layer F.CrtYd) (width 0.05))
(fp_line (start 8.57 -1.05) (end -0.95 -1.05) (layer F.CrtYd) (width 0.05))
(pad 2 thru_hole oval (at 7.62 0 270) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask)
(net 1 "Net-(1K1-Pad2)"))
(pad 1 thru_hole circle (at 0 0 270) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask)
(net 2 "Net-(1K1-Pad1)"))
(model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(gr_line (start 133.35 98.425) (end 133.35 116.205) (layer Edge.Cuts) (width 0.1))
(gr_line (start 118.11 98.425) (end 133.35 98.425) (layer Edge.Cuts) (width 0.1))
(gr_line (start 118.11 116.205) (end 118.11 98.425) (layer Edge.Cuts) (width 0.1))
(gr_line (start 133.35 116.205) (end 118.11 116.205) (layer Edge.Cuts) (width 0.1))
(segment (start 125.73 109.22) (end 125.095 109.855) (width 0.25) (layer F.Cu) (net 1))
(segment (start 125.73 109.22) (end 125.095 109.855) (width 0.25) (layer B.Cu) (net 1))
(segment (start 129.54 109.22) (end 125.73 109.22) (width 0.25) (layer B.Cu) (net 1))
(segment (start 122.555 101.6) (end 129.54 101.6) (width 0.25) (layer F.Cu) (net 2))
(segment (start 122.555 109.855) (end 122.555 104.14) (width 0.25) (layer F.Cu) (net 3))
)This is a typical rendering problem, the file is OK. Antialiasing shouldn’t be a problem. Have you actually changed to Accelerated mode?
1 Like
I do not use that brand of PC, but I have seen at least 2 other recent threads on this forum of the drawing area not being rendered.
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This is a known issue on MacOS: Fallback mode is not supported. The drawing area will only show up in Accelerated mode
1 Like
I don’t think I have an option to only select accelerated:
And fallback has the exact same options. Not sure which one’s to choose here…
I have tried different modes on both and still no results. Is there an optimal setting. I am on Mac OS Mojave…
As far as I know, the problem does not relate to antialiasing setting – You need to switch the rendering mode at the bottom of the preferences menu (not actually open the preferences)
1 Like
Ahhhh - ok I see now. I was in the main preferences. This is what is being referred to on pcbNew:
I’ve been running nightly only for too long… forgot we used to call those Toolset 
1 Like
I’m not sure here, but I do seem to recall that changing rendering to “Modern Toolset (Accelerated)” only worked to get the canvas back after a restart of KiCad. But memory is vague, others have reverted to an older KiCad version for this. It may be worth digging up the other threads for this issue (Less than a month old).
1 Like
That solved it and no worries - thanks to all who stuck with this new kiCad user. I really appreciate the patience and support 
Ill go back and have a look on this one, thank you. I had to restart kiCad once I set to “Modern Toolset (Accelerated)”, I also set main prefs back to “no antialiasing” but not sure if that matters
You should be able to experiment with antialiasing modes for Accelerated and see what looks best to you, they should all work
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This is one of those threads, and apparently fixed by changing to “accelerated”.
1 Like
Ah - perfect - this is the exact same behavior/ issue. The previous version of kCad I was using before I upgraded:
I am pretty sure I was using Modern Toolset (fallback).
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