Hi, I would appreciate some help understanding what is happening with the bus traces I see in the attached image. It is a partial screen grab. But it shows the section I can’t figure out. Looking at this design I realised I need to learn more about this. I understand the basic idea of the thick bus trace but this one has bamboozled me. GPIO1 is a connector. I gather for the most part these traces are returning back to the connecter after passing through resisters and some heading out to other components.
But looking at the labels I can’t seem to understand the logic of it. I thought all the “g#” labels are a ground connections, but some are connected on both sides of some resisters. Also I would have thought they would all have the same label or a ground symbol. The other ones don’t seem logical to me either. Is there a methodology to following this branching layout? If I were to create this in KiCad would I just use them as connected labels where matching labels connect? Am I just being thrown off by the labelling used here?
When simple labels such as this are used, they are very similar to (or exactly the same?) as regular labels. This is for compatibility with old schematics, in which the blue lines were only graphical markup.
But in newer KiCad versions, the bus itself can have a name, and labels then both have the bus name and the signal name. Then you can make it even more complicated by renaming whole buses though a hierarchical schematic and it becomes confusing again. When you get there, it’s time to (re)read some part of the manual.
Yea. RTM… yea. Earlier today I was looking for quite a while for articles and such about this but I think keywords were working against me and I didn’t really find anything. this context for all my combinations were low priority for the search engines I used. I’ve been using regular labels but non of my project needed buses. Doing pretty simple stuff. Seeing this just made me curious. Probably the puzzle of it got me wanting to know the answer.
The section about buses in KiCad manual is quite clearly written. Some time ago I also experimented a bit bit different sorts of bus usages and made an example project with that:
The author seems to be abusing buses to show some resistor ladders made using resistor network packs. You could remove the thick bus lines and the bus entry lines and the circuit would still be the same since the labels create all the connections. Unless you need to understand this circuit, I would just put it aside as a confusing idiosyncrasy.
I had not even attempted to analyze the schematic.
In KiCad you can you can define such a resistor network as a separate unit for each resistor, so you can place them just like separate resistors in the schematic. In the same way as logic gates such as logic gates. Maybe that can help to organize it a bit more.
For me the way this schematic was drawn is very hard to read but you can find some logic in it. For example all resistors in RN6 are connected in serie and resistors from RN5 are connected into connection points between RN6. It can be something like R-2R structure.
Earlier today I was looking for quite a while for articles and such about this but I think keywords were working against me and I didn’t really find anything. this context for all my combinations were low priority for the search engines I used. I’ve been using regular labels but non of my project needed buses. Doing pretty simple stuff. Seeing this just made me curious. Probably the puzzle of it got me wanting to know the answer.