I’m using this trick to share a drill hole for two jack’s ground connection to really squeeze a front panel design. I know it’s ugly and I should probably do some kind of multi-unit symbol/footprint thing if I continue using this:
But would be really nice if one could just suppress specific markers somehow. Dunno how that would work - just a black list filter of exact(ish?) position and error type like:
KiCad right now has no option to approve specific DRC (or ERC) errors. You will need to live with this report or do it properly as you already hinted at)
Actually the error got removed when the drills where the exact same. I had a 0.015mm offset that I accidentally created there. They still come through to the Excellon file though:
But I’m guessing fab houses will merge these? I think I did the same thing before at jlcpcb and it was fine. Hopefully they have routines against drilling the same hole twice? I know from my own cnc experience that might be problematic, at least if there’s a small offset - my cheap drills would easily break in that case…
Submit your comments to the “ERC/DRC User Survey” by @craftyjon . I actually see two potential enhancements to DRC in your comments:
The ability to mark particular ERC/DRC squawks as “Irrelevant”, or “Ignore”, or “Suppress in future ERC/DRC runs”, etc. Of course, the dialog that launches ERC/DRC would need options to honor the list of “Ignored” items, or flag them regardless of the “Ignore” attribute, or cancel all instances of the “Ignore” attribute. Perhaps the ERC/DRC algorithm would mark the “Ignore” items with a greyed-out flag symbol, or list them in a separate section of the ERC/DRC report as “Still present but ignored”.
The ability to run ERC/DRC with a limited scope, flagging only certain types of violations. You could tell ERC/DRC to ignore, e.g., silk screen violations, or no-source-to-drive-the-net errors, or courtyard violations, etc.
