I am trying to simulate a switching power supply. I cannot really get the timestep below 10ms, which seems to be a bit coarse for this (datasheet says switching frequency is between 100kH to 1Mhz). And cannot wrap my head around what I see.
The power FETs apparently do not open (drain current of them is constant 18nA and 2.73nA), the coil have a constant current (273 mA), so as I understand if these are true, there should be no big transients in the system.
And the currents in the Ruv1-1, Ruv1-2, IC-1/EN/UVLO triangle does not add up with sometimes more than 10A error, the big current flowing through Ruv2-1. And the voltage is in the ±100 aV range, while the current on EN/UVLO is in the fA range, and without EN/UVLO connected, the voltage in the middle of the resistance ladder is 2.12V, as it should be. As EN/UVLO is intended to be an input, I cannot see how is this possible.
The simulation with smaller timesteps (I tried us and ps values, but even 2us does not work) halts with “Timestep too small”, and citing problems with various nodes.
I am stuck with this. Is there anything I could read about the problems with small timesteps to better understand the problem? Any insight on what is really going wrong?
As an unrelated question, is it possible to use more values with the same cursor, or use more than two cursors?
I could get the simulation running for small timesteps with the following parameters:
.options rshunt=1e9 chgtol=1e-10 gmin=1e-10 abstol=1e-10 reltol=0.003 cshunt=1e-15, and adding an 1G internal impedance to the voltage source.
However it is still behaving strange in the same way. I got the design from here: Power Designer and I am using the pspice library provided by TI.
I believe those things should be correct and bug-free. Or not?
I would need help to figure out whether the error is in the schematics, the library or the simulation.
Thank you, that helped a bit, but I still cannot get the simulation to run reasonably.
With timestep of 10us and interval of 1ms, the simulation gets to 0.119 ms and dies with timestep too small.
Probably I will build the schematics bit by bit, and create a rudimentary simulative circuit for the IC itself as I go forward. This way I will learn a lot about things I have no idea now, and at the end of the process I can be reasonably sure that my part of the circuit is okay. Then I try to swap the IC in.
It seems that spice’s VDC dies if I give it any internal impedance. The voltage will be zero, even if I give 0 as internal impedance value later. I could fix it only by deleting it from the sheet and adding a new one.
No, pin assignment is an absolute prerequisite for any reasonable simulation.
Don’t touch VDC. Take it as what it is, an ideal voltage source. If you want an series resistance, add it externally.
Simulating switch mode power supplies is not an easy task. You will need to understand more of what the IC is doing in all of its internal blocks.
I have fiddled a little more with the circuit, using the parameter values given in the data sheet, and this is the result of a 18V in, 5 V out converter:
The output is indeed regulated to 5 V after some time. However the simulation takes several minutes.
My project is attached. I have added some options, and some initial conditions, the VDC is now a VPULSE with a ramp starting at 0 V. DCDC2.7z (23.7 KB)
