Spice simulaton AO3400

Schematic Simulation (Ngspice)
1

I have this very simple test circuit

.subckt simulator_test
.include "/home/user/datasheets/fets/AO3400.mod"
V1 +5V GND DC 5 
XQ1 Net-_Q1-G_ GND /VC1 AO3400
R1 +5V /VC1 10k
V2 Net-_Q1-G_ GND PULSE( 0 2 0 1u 1u 0.1 0.2 ) 
.ends

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V1 is +5V DC and V2 is a +5V square wave. The AO3400 model was taken from here https://github.com/rdmeneze/LTSpiceModels/blob/master/AO3400.mod

If I run a transient simulation on it, then I see that maximum voltage on VC1 is 5.0V, which is fine. But the minimum voltage is 456mV, that can’t be right. In fully off state, drain-source resistance is dominated by leakage current. The datasheet says leakage current at 30V Vds is 5 uA maximum, so the off-state resistance should be at least 6 megaohms. So in off state, VC1 should be 5/(1e4+6e6)*1e4 = 8 mV at most.

I don’t know enough about spice models to understand the mod file, can somebody please tell me if I did something wrong? Or maybe the mod file is wrong?

2

Assuming an off state “resistance” of 6 Mega Ohm, VC1 is more like:

5/(1e4+6e6)*6e6 = 4.9916805324459235

(I.e., 5V -8mV, you swapped a resistor there).

When I see this model:

.SUBCKT AO3400 4 1 2
M1 3 1 2 2 NMOS W=998956u L=1.0u
M2 2 1 2 4 PMOS W=998956u L=0.4u
R1 4 3 RTEMP 15E-3
CGS 1 2 225E-12
DBD 2 3 DBD

.MODEL NMOS NMOS (LEVEL = 3 TOX = 2.5E-8

  • RS = 2E-4 RD = 0 NSUB = 1.6E17
  • kp = 3E-5 UO = 600 THETA = 0
  • VMAX = 0 XJ = 4E-7 KAPPA = 1.1
  • ETA = 0 TPG = 1
  • IS = 0 LD = 0
  • CGSO = 0 CGDO = 0 CGBO = 0
  • NFS = 2E10 DELTA = 0.1)

.MODEL PMOS PMOS (LEVEL = 3 TOX = 2.5E-8
+NSUB = 2.0E16 TPG = -1)

.MODEL DBD D (CJO=690E-12 VJ=0.6 M=0.3
+RS=0.005 FC=0.5 IS=1E-11 TT=1.5E-8 N=1.0 BV=36 IBV=1E-4)

.MODEL RTEMP RES (TC1=6.5E-3 TC2=1E-6)

.ENDS

then it looks like it expects pin numbers 4, 1 and 2. Problems with pin numbers are quite common during addition of spice models to KiCad symbols. KiCad’s pin numbers are based on the footprint pads, while spice does not use “pin” numbers, but “node numbers”. These numbers are quite like a “net” in KiCad. These numbers are often quite random, or follow some unknown rules.

KiCad does have the ability to map the pin numbering of symbols to the spice node numbers, but you have to enter this manually. There is a Pin Assignments tab in the Spice Model part of the symbol properties.

image

3

About an hour later…

With this schematic:

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I made this simulation:

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Looks quite plausible to me, with a threshold voltage of 1200mV.
It took quite some puzzling to figure out what the pin assignment was, but I finally did find it in the ngSpice manual.

A working example:
2025-05-30_asdf_AO3400.zip (7.1 KB)

A mini tutorial from what I figured out about the model:

.SUBCKT AO3400 4 1 2

This subckt model of the AO3400 exposes three internal nodes with numbers 4, 1, and 2.

R1 4 3 RTEMP 15E-3

Resistor R1 has (likely?) a value of 15mOhm, and some extra parameters from the RTEMP model lower in the file. (Looks like temperature coefficients.)

I.e, there is a small resistor between nodes 4 and 3.

From the ngSpice manual: an NMOS model, has it’s nodes in the order:

drain, gate, source, bulk.

So from this:

M1 3 1 2 2 NMOS W=998956u L=1.0u

Drain = 3 (exposed as “4” with a small series resistor).
Gate = 1
Source = Bulk = 2

With that info, the total pin mapping becomes:

image
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This subcircuit model also has another PMOS fet in it. I guess this is used to simulate some sort of imperfection of the main fet, but further details are a bit fuzzy to me.

2 Likes
4

Paul, good catch!

It is really customer friendly that this model does not tell the user what node is drain, gate or source.

The PMOS is probably a voltage dependent capacitor, as drain and source are shortened.

1 Like
5

Thank you for your help, and for spending so much time with this. I’m new to KiCad, and I can already see that the community is very welcoming and helpful here.

This is really not the best thing:

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Especially as a beginner, I have no idea what 2 and 1 means in “2 (1)”, which one is the pin and which one is the node in model .

Probably a better naming would be:

.SUBCKT AO3400 4D 1G 2S

I’ll try to change the model source that way, and submit a PR to the model’s author.

It is also not clear why would anybody use pin number 4, when pin number 3 is not used? The official datasheets of these devices usually do not mention pins by their numbers, and the default package Package_TO_SOT_SMD:SOT-23 also does not have pin 4; only 1,2,3.

1 Like
6

In
.SUBCKT AO3400 4 1 2
the node names 4 1 2 are used inside of the subcircuit to connect the internal devices. Instead of numbers one could use letters or a combination of both.

To the outside, when calling the subcircuit, the node names are not of impartance, but the sequence of the nodes, their position in the list is.

As Paul has noted, the position numbers (from left to right) 1, 2, 3 correspond to the node names 4 1 2 and correspond to the device terminals drain, gate, and source.

These position do not correspond to the symbol pin numbers, which stem from the transistor package, and which are determining the outside connections.

The pin assignment has the task to translate between symbol and model pins.

The symbol column on the left is fixed. The user has to shift the nodes in the list of model pin on the right., so that the functions (drain, gate, source) match.

.“2 (1)” does then mean: position “2”, with model node name “1”. Position 2 is the gate.