Hi, I’m a student who is new to both PCB design and KiCad, I’ve spent a good while looking through some tutorials and been doing fine in my work so far. Now I’ve got a new mini-project going and my goal is to produce a prototype PCB for some testing of a couple of resistors. I want to use the method of 4-terminal sensing, and have therefore drawn a schematic with 2 N-type PCB mounts.
Now, the problem I’m having is that, when I start PCBnew and read my netlist, all the footprints load in correctly but not all connections are drawn. One of the coaxial connectors gets left haning in the air. Like this. (Not sure how to attach pictures)
Also, here is a picture over the schematic in Eeschema. I’ve already tried moving around the joints with “G” to check that everything is indeed connected.
You should be able to drag and drop pictures into the reply box. (As a new user you can only post one picture per post.)
Now to your real problem:
I noticed that sometimes pcbnew does not update the view correctly. In this cases it helps to restart pcbnew.
You can also try to switch between opengl and legacy canvas. And run drc.
If this does not help we might need more information.
Especially: What kicad version are you using. What operating system.
Did you try to switch to OpenGL yet? [F11] (back to Legacy via F9]
It shows the ratsnest a little bit better.
Also, post the netlist file if this doesn’t help you.
We can check if the net is correct or not… it’s just 4 devices, shouldn’t be big.
PS:
pictures can be attached by either using [Ctrl]+[v] in the reply window (if you got one in the clipboard) or there is a little button for uploading things and last but not least you can drag+drop images from your computers explorer into the editor box as well…
If I run drc and check the unconnected pads, it seems there is no net including any of the resistors and the component “J2”. Would this suggest the problem does lie in the .net file?
In the netlist you can see that J2 is not connected to the shunt.
You might want to do an new annotation before generating the netlist. I had similar situations when I erased a part, copied a new one and edited the reference designator manually (‘U’) to reflect the original reference designator.
I tried this too, but as you are saying E1 and I1 are connected, wich is how it should be (at least in my head, maybe this is not how you do things in pcb design though?).
For reference here is the resistor I want to place. And as the internal schematic suggest both of the legs are connected from “inside” the resistor.
I’ve noticed that this can indeed help in some situations, but it would seem that in this case the component isn’t actually connected to the rest of the schematic, right?
Back to your problem.
Did you run an electrical rule check on your schematic? If not: run it and show what it says. (If @Joan_Sparky is correct, then you will get a message about unconnected pins.)
PS: I assumed that the corner would have been not connected properly and some visual glitch didn’t make it obvious, but moving everything and it keeping together ruled that one out.
PPS: I’m running a nightly from 12th May on Win7 64bit though which I can’t fail at the moment… Version: (2017-05-12 revision b823d0b78)
Yes, I did run an erc with default settings and got no errors or warnings.
Could the problem have something to do with the fact that the component “CONN_COAXIAL” only has 2 pins and the footrpint I made for the PCB-mount has 5 pads?
No, the netlist is wrong… PCBnew is not at fault. This is some error in EEschema related code that makes the netlist.
PS: if you download the netlist file in that post up there with the _3 in the name… can you load that in PCBnew and look if it solves the problem for you?
I think the problem might be that two pins of the symbol have the same pin number. This should not be done. (E1 and I1 currently have the pin number 1. E2 and I2 have pin number 2)
The correct way would be to give the symbol one pin number per pin. (Or to only have two pins in the symbol.)
If @EJones decides to go the road of 4 pin numbers in the symbol, he also needs to change the footprint accordingly.
Edit:
output of the erc check of the symbol:
Duplicate pin 1 "I1" at location (-0.200, 0.000) conflicts with pin 1 "E1" at location (-0.100, 0.150).
Duplicate pin 2 "I2" at location (0.200, 0.000) conflicts with pin 2 "E2" at location (0.100, 0.150).