I’ve not seen this before, so hoping it’s something obvious I’m missing.
I have a design with 3V3 and 5V linear regulators. The DC jack I have connected to VCC, but when I export to Pcbnew, the pin on the DC jack is connected to net name +3v3. I’ve exported the net list, deleted the jack and re-imported it in pcbnew, but it doesn’t change. This power part of the circuit I’ve also broken up so I had VCC feeding both regulators as I tried to work out the cause and a fix.
If I add a PWR_FLAG to VCC the ERC errors complaining that the output of the 3v3 regulator is connected to the input.
Any ideas why the VCC symbol is connected to 3V3? I can get the result I’m actually wanting by replacing the VCC symbol with +12V.
Is this a known bug or what am I missing about the VCC symbol?
Thanks so much. Yes that is the cause. I have a CD74H4050 buffer which has hidden VCC and VSS pins. Since I’ve connected that VCC pin to 3V3 the nets are connected.
Mystery solved - that’s a trap I’ll be watchful for in future.
There was some discussion on the dev list whether having multiple labels for the same net should be an error or not. There is a school of thought that it’s a “best practice” issue, rather than an ERC warning. There are similar views whether hidden pins should be “banned”, generate a warning, give the rope to let the user hang himself etc.
Unfortunately these things frequently leads to subtle and bad errors in the PCB, which IMO there should at least be an option to enable a warning for these things.
[quote=“bobc, post:4, topic:2408”]
IMO there should at least be an option to enable a warning for these things.
[/quote]I agree. In fact it’s only blind luck that I’ve not done this before - going back through other designs with buffers and op amps I’ve been fortunate enough to specify the input voltage rather than using the generic VCC.
Thanks for the links. People have been falling into this trap for years…I feel in good company
