Scary thing with pin-names and net list

[davidsrsb]

Hidden pins using global signal names has long been an issue, eg

[SOLVED] Incorrect net exported from Eeschema when using VCC power symbol?

Hi guys, I’ve not seen this before, so hoping it’s something obvious I’m missing. I have a design with 3V3 and 5V linear regulators. The DC jack I have connected to VCC, but when I export to Pcbnew, the pin on the DC jack is connected to net name +3v3. I’ve exported the net list, deleted the jack and re-imported it in pcbnew, but it doesn’t change. This power part of the circuit I’ve also broken up so I had VCC feeding both regulators as I tried to work out the cause and a fix. [image] [im…

I personally don’t like hidden pins at all