I have been playing around a little with the IC design style (simulation only) for CMOS, using KiCad-5.99. Attached you will find a possible solution as a zipped project.
I have created 2 new symbols, PMOS and NMOS. Both transistors have 4 terminals, as required in IC design: drain 1, gate 2, source 3, and bulk 4.
With the symbol editor I have added 4 additional fields, which are normally created only during attaching a Spice model to a symbol. For example for the NMOS:
Spice_Model NCH W=1 L=1
So these fields are already integrated into the symbol which is stored in the (private) symbol library. Thus the user does not need to attach a Spice model each time he or she places a new device into the circuit diagram. The only thing to do is to edit the Spice_Model line for an adequate W and L (given in m, for example W=2u L=0.5u).
The new symbols are stored locally in the private library CMOS.kicad_sym and are referenced with a relative path in sym-lib-table.
The file cmos_sub.mod allows access to the model parameters for the MOS devices. It contains 2 subcircuit models for NMOS and PMOS. Each model calls the MOS primitive, but also performs some area calculation for drain/source capacitors. The original Spice model parameters are referencing the Berkeley BSIM3 MOS model, which is adequate for conservative CMOS down to 0.35um channels (modelcard.pmos, modelcard.nmos). The data stem from Berkeley’s original model development and are not describing a real foundry process.
The circuit is simple: a CMOS inverter, driven by a pulsed voltage source. It uses global labels for naming some nets (o.k. because we do not generate a PCB, and their net names are not modified).
If running the simulation, do not set Sim Parameters --> Compatibility Mode to LTSPICE or PSPICE, because then the BSIM3 models may not be referenced adequately.
ngspice also offers the BSIM4 MOS model, which is o.k. down to 45 nm or so. You just need to have access to suitable model cards (see the link given in a previous post).
CMOStest.zip (10.1 KB)
Following is a slightly more complex example, a two stage CMOS operational amplifier according to the paper https://papers.ssrn.com/sol3/papers.cfm?abstract_id=3433181 , using the CMOS symbols as described above.
CMOSOpAmp.zip (34.3 KB)
The circuit diagram (Eeschema screenshot) looks like
Edit: Fix a bug (exchange in+ and in-)