Simulations for IC-Design with NGSPICE

Hello,

I would like to evaluate if a circuit design would benefit if I would made an IC instead of a circuit with discrete components. Since the interface of eeschema is quit comfortable I would like to use the KiCAD environment for the simulations. However, independent of the interface to ngspice, I need the component parameters for the simulation. Usually foundries provide PDK being compatible with cadance, mentor and ADS. Is there any chance for ngspice to access these information too?

I found the homepage http://opencircuitdesign.com/ coorperating with the google skywater technology. But to my understanding they are focusing on digital design and I would like to do some analog simulations e.g. for a x-fab technology.

Patrick

You will need to ask X-Fab to get access to their PDK. ngspice then will be able to handle it (proven with some 0.18um process).

Sure I have to ask them, but how does the interface between ngspice and the PDK works? I already saw PDKs from STM and IHP and they did not include a lib-file with spice code which could be used to generate a library representing the components of the process.

You may ask to obtain a HSPICE compatible simulation support. ngspice should be able to read this.

Some more info on IC-parameters for simulation is available on the ngspice model parameter page.

I have been playing around a little with the IC design style (simulation only) for CMOS, using KiCad-5.99. Attached you will find a possible solution as a zipped project.

I have created 2 new symbols, PMOS and NMOS. Both transistors have 4 terminals, as required in IC design: drain 1, gate 2, source 3, and bulk 4.

With the symbol editor I have added 4 additional fields, which are normally created only during attaching a Spice model to a symbol. For example for the NMOS:

Spice_Primitive             X
Spice_Model                 NCH W=1 L=1
Spice_Netlist_Enabled       Y
Spice_Lib_File              cmos_sub.mod

So these fields are already integrated into the symbol which is stored in the (private) symbol library. Thus the user does not need to attach a Spice model each time he or she places a new device into the circuit diagram. The only thing to do is to edit the Spice_Model line for an adequate W and L (given in m, for example W=2u L=0.5u).

The new symbols are stored locally in the private library CMOS.kicad_sym and are referenced with a relative path in sym-lib-table.

The file cmos_sub.mod allows access to the model parameters for the MOS devices. It contains 2 subcircuit models for NMOS and PMOS. Each model calls the MOS primitive, but also performs some area calculation for drain/source capacitors. The original Spice model parameters are referencing the Berkeley BSIM3 MOS model, which is adequate for conservative CMOS down to 0.35um channels (modelcard.pmos, modelcard.nmos). The data stem from Berkeley’s original model development and are not describing a real foundry process.

The circuit is simple: a CMOS inverter, driven by a pulsed voltage source. It uses global labels for naming some nets (o.k. because we do not generate a PCB, and their net names are not modified).

If running the simulation, do not set Sim Parameters --> Compatibility Mode to LTSPICE or PSPICE, because then the BSIM3 models may not be referenced adequately.

ngspice also offers the BSIM4 MOS model, which is o.k. down to 45 nm or so. You just need to have access to suitable model cards (see the link given in a previous post).

CMOStest.zip (10.1 KB)

Following is a slightly more complex example, a two stage CMOS operational amplifier according to the paper https://papers.ssrn.com/sol3/papers.cfm?abstract_id=3433181 , using the CMOS symbols as described above.

CMOSOpAmp.zip (34.3 KB)

The circuit diagram (Eeschema screenshot) looks like

Edit: Fix a bug (exchange in+ and in-)

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This is not directly related to above and to KiCad, but maybe still interesting.

For a single IC design, it can be more convenient to have separate transistor symbols with only 3 terminals (for BJTs it’s also common to connect the B terminal with a wire through the symbol) and have a single, separate bulk/substrate symbol that handles all the substrate connections and that also pulls in a single library file for all other symbols (but that could include other files). That way if the library file name changes, only a single symbol needs to be modified.

Here is an example that does this: It’s been converted to LTspice from the original 700 Series Manual and Design Files that are related to Hans Camenzind’s Designing Analog Chips book (latest PDF here). KiCad and ngspice have similar mechanisms like LTspice, so while this example doesn’t work with them, it could still be instructive for people familiar with SPICE (here the frame/chassis symbol 7-SUB is (mis)used for the substrate; see also included 0-ReadMe.txt):

700.zip (100 KB)
700symbols

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Franzee, do you have (or will provide) a KiCad symbol library with the bipolar symbols?

Meanwhile I have been working on an update of the CMOS symbols for IC design.

Attached you will find another example, the CMOS 555 circuit (Fig. 11.9) from Camenzinds book.

However I have not created MOS symbols with only three pins. Why not?

The integrated MOS device is a true 4-terminal device. The designer has always to consider that the transistor may also be controlled by a backgate voltage (voltage between bulk and source).
And all foundry models for MOS are 4-terminal models.

I am not yet completely satisifed with the symbols. You have to enter W and L twice, for the printout and for the model. I have not yet found a better way to make the printout compact. The position of the printouts (Transistor instance, W, L, (and M)) is somewhat erratic. The nice picture has required some manual movement.

The project is
CMOS555_2.zip (86.9 KB)

The simulation shows the oscillation starting after some start-up time.

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I haven’t looked at this at all for almost 3 years, so I’m trying to remember…

I don’t have any plans right now. Maybe the original SIMetrix or OrCAD symbols could be imported into KiCad somehow? The reason to redraw them for LTspice was that it has only a resolution of 1/16 of the grid size. But this doesn’t work so well with the 1/100 resolution of KiCad 5 and I think the original symbols were also 1/100 (this wouldn’t be a problem on KiCad 6 anymore once it stabilizes).

The 700 Series doesn’t cover CMOS, so there was no need to have MOS symbols, but obviously it doesn’t cover the whole book…

Of course, for CMOS there would be, for most transistors, only 2 potentials used for bulk and it’s usually clear which one goes where, and also which terminals are D and S. To be able to have a wire go through the symbol for G, a simplified non-standard symbol with a determining arrow on G, which was in the center and directly connected to the channel, like D and S, was often used…

Makes sense, models alone are faster than having them wrapped into subcircuits like in the 700 Series library.

I think the SPICE_MODEL field could just be made visible instead?
Maybe it would look nicer to just create a new model using AKO for
every parameterization (examples in semiconductor.lib in this Zip file)?

At one point there was also an Analog Symbol Library (some 60-odd symbols under Apache 2.0 License) by Si², maybe start there instead?

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